Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/arm/at91/at91.c
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1 /*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD: releng/8.1/sys/arm/at91/at91.c 193847 2009-06-09 18:18:41Z marcel $"); 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/bus.h> 32 #include <sys/kernel.h> 33 #include <sys/malloc.h> 34 #include <sys/module.h> 35 36 #include <vm/vm.h> 37 #include <vm/vm_kern.h> 38 #include <vm/pmap.h> 39 #include <vm/vm_page.h> 40 #include <vm/vm_extern.h> 41 42 #define _ARM32_BUS_DMA_PRIVATE 43 #include <machine/bus.h> 44 #include <machine/intr.h> 45 46 #include <arm/at91/at91rm92reg.h> 47 #include <arm/at91/at91var.h> 48 49 static struct at91_softc *at91_softc; 50 51 static void at91_eoi(void *); 52 53 uint32_t at91_master_clock = AT91C_MASTER_CLOCK; 54 55 static int 56 at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, 57 bus_space_handle_t *bshp) 58 { 59 vm_paddr_t pa, endpa; 60 61 pa = trunc_page(bpa); 62 if (pa >= 0xfff00000) { 63 *bshp = pa - 0xf0000000 + 0xd0000000; 64 return (0); 65 } 66 if (pa >= 0xdff00000) 67 return (0); 68 endpa = round_page(bpa + size); 69 70 *bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa); 71 72 return (0); 73 } 74 75 static void 76 at91_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size) 77 { 78 vm_offset_t va, endva; 79 80 va = trunc_page((vm_offset_t)t); 81 endva = va + round_page(size); 82 83 /* Free the kernel virtual mapping. */ 84 kmem_free(kernel_map, va, endva - va); 85 } 86 87 static int 88 at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 89 bus_size_t size, bus_space_handle_t *nbshp) 90 { 91 92 *nbshp = bsh + offset; 93 return (0); 94 } 95 96 static void 97 at91_barrier(void *t, bus_space_handle_t bsh, bus_size_t size, bus_size_t b, 98 int a) 99 { 100 } 101 102 bs_protos(generic); 103 bs_protos(generic_armv4); 104 105 struct bus_space at91_bs_tag = { 106 /* cookie */ 107 (void *) 0, 108 109 /* mapping/unmapping */ 110 at91_bs_map, 111 at91_bs_unmap, 112 at91_bs_subregion, 113 114 /* allocation/deallocation */ 115 NULL, 116 NULL, 117 118 /* barrier */ 119 at91_barrier, 120 121 /* read (single) */ 122 generic_bs_r_1, 123 generic_armv4_bs_r_2, 124 generic_bs_r_4, 125 NULL, 126 127 /* read multiple */ 128 generic_bs_rm_1, 129 generic_armv4_bs_rm_2, 130 generic_bs_rm_4, 131 NULL, 132 133 /* read region */ 134 generic_bs_rr_1, 135 generic_armv4_bs_rr_2, 136 generic_bs_rr_4, 137 NULL, 138 139 /* write (single) */ 140 generic_bs_w_1, 141 generic_armv4_bs_w_2, 142 generic_bs_w_4, 143 NULL, 144 145 /* write multiple */ 146 generic_bs_wm_1, 147 generic_armv4_bs_wm_2, 148 generic_bs_wm_4, 149 NULL, 150 151 /* write region */ 152 NULL, 153 generic_armv4_bs_wr_2, 154 generic_bs_wr_4, 155 NULL, 156 157 /* set multiple */ 158 NULL, 159 NULL, 160 NULL, 161 NULL, 162 163 /* set region */ 164 NULL, 165 generic_armv4_bs_sr_2, 166 generic_bs_sr_4, 167 NULL, 168 169 /* copy */ 170 NULL, 171 generic_armv4_bs_c_2, 172 NULL, 173 NULL, 174 175 /* read (single) stream */ 176 generic_bs_r_1, 177 generic_armv4_bs_r_2, 178 generic_bs_r_4, 179 NULL, 180 181 /* read multiple stream */ 182 generic_bs_rm_1, 183 generic_armv4_bs_rm_2, 184 generic_bs_rm_4, 185 NULL, 186 187 /* read region stream */ 188 generic_bs_rr_1, 189 generic_armv4_bs_rr_2, 190 generic_bs_rr_4, 191 NULL, 192 193 /* write (single) stream */ 194 generic_bs_w_1, 195 generic_armv4_bs_w_2, 196 generic_bs_w_4, 197 NULL, 198 199 /* write multiple stream */ 200 generic_bs_wm_1, 201 generic_armv4_bs_wm_2, 202 generic_bs_wm_4, 203 NULL, 204 205 /* write region stream */ 206 NULL, 207 generic_armv4_bs_wr_2, 208 generic_bs_wr_4, 209 NULL, 210 }; 211 212 static int 213 at91_probe(device_t dev) 214 { 215 device_set_desc(dev, "AT91 device bus"); 216 arm_post_filter = at91_eoi; 217 return (0); 218 } 219 220 static void 221 at91_identify(driver_t *drv, device_t parent) 222 { 223 224 BUS_ADD_CHILD(parent, 0, "atmelarm", 0); 225 } 226 227 struct arm32_dma_range * 228 bus_dma_get_range(void) 229 { 230 231 return (NULL); 232 } 233 234 int 235 bus_dma_get_range_nb(void) 236 { 237 return (0); 238 } 239 240 extern void irq_entry(void); 241 242 static void 243 at91_add_child(device_t dev, int prio, const char *name, int unit, 244 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2) 245 { 246 device_t kid; 247 struct at91_ivar *ivar; 248 249 kid = device_add_child_ordered(dev, prio, name, unit); 250 if (kid == NULL) { 251 printf("Can't add child %s%d ordered\n", name, unit); 252 return; 253 } 254 ivar = malloc(sizeof(*ivar), M_DEVBUF, M_NOWAIT | M_ZERO); 255 if (ivar == NULL) { 256 device_delete_child(dev, kid); 257 printf("Can't add alloc ivar\n"); 258 return; 259 } 260 device_set_ivars(kid, ivar); 261 resource_list_init(&ivar->resources); 262 if (irq0 != -1) 263 bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1); 264 if (irq1 != 0) 265 bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1); 266 if (irq2 != 0) 267 bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1); 268 if (addr != 0) 269 bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size); 270 } 271 272 struct cpu_devs 273 { 274 const char *name; 275 int unit; 276 bus_addr_t mem_base; 277 bus_size_t mem_len; 278 int irq0; 279 int irq1; 280 int irq2; 281 }; 282 283 struct cpu_devs at91rm9200_devs[] = 284 { 285 // All the "system" devices 286 { 287 "at91_st", 0, 288 AT91RM92_BASE + AT91RM92_ST_BASE, AT91RM92_ST_SIZE, 289 AT91RM92_IRQ_SYSTEM 290 }, 291 { 292 "at91_pio", 0, 293 AT91RM92_BASE + AT91RM92_PIOA_BASE, AT91RM92_PIO_SIZE, 294 AT91RM92_IRQ_SYSTEM 295 }, 296 { 297 "at91_pio", 1, 298 AT91RM92_BASE + AT91RM92_PIOB_BASE, AT91RM92_PIO_SIZE, 299 AT91RM92_IRQ_SYSTEM 300 }, 301 { 302 "at91_pio", 2, 303 AT91RM92_BASE + AT91RM92_PIOC_BASE, AT91RM92_PIO_SIZE, 304 AT91RM92_IRQ_SYSTEM 305 }, 306 { 307 "at91_pio", 3, 308 AT91RM92_BASE + AT91RM92_PIOD_BASE, AT91RM92_PIO_SIZE, 309 AT91RM92_IRQ_SYSTEM 310 }, 311 { 312 "at91_pmc", 0, 313 AT91RM92_BASE + AT91RM92_PMC_BASE, AT91RM92_PMC_SIZE, 314 AT91RM92_IRQ_SYSTEM 315 }, 316 { 317 "at91_aic", 0, 318 AT91RM92_BASE + AT91RM92_AIC_BASE, AT91RM92_AIC_SIZE, 319 0 // Interrupt controller has no interrupts! 320 }, 321 { 322 "at91_rtc", 0, 323 AT91RM92_BASE + AT91RM92_RTC_BASE, AT91RM92_RTC_SIZE, 324 AT91RM92_IRQ_SYSTEM 325 }, 326 { 327 "at91_mc", 0, 328 AT91RM92_BASE + AT91RM92_MC_BASE, AT91RM92_MC_SIZE, 329 AT91RM92_IRQ_SYSTEM 330 }, 331 332 // All other devices 333 { 334 "at91_tc", 0, 335 AT91RM92_BASE + AT91RM92_TC0_BASE, AT91RM92_TC_SIZE, 336 AT91RM92_IRQ_TC0, AT91RM92_IRQ_TC1, AT91RM92_IRQ_TC2 337 }, 338 { 339 "at91_tc", 1, 340 AT91RM92_BASE + AT91RM92_TC1_BASE, AT91RM92_TC_SIZE, 341 AT91RM92_IRQ_TC3, AT91RM92_IRQ_TC4, AT91RM92_IRQ_TC5 342 }, 343 { 344 "at91_udp", 0, 345 AT91RM92_BASE + AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, 346 AT91RM92_IRQ_UDP, AT91RM92_IRQ_PIOB 347 }, 348 { 349 "at91_mci", 0, 350 AT91RM92_BASE + AT91RM92_MCI_BASE, AT91RM92_MCI_SIZE, 351 AT91RM92_IRQ_MCI 352 }, 353 { 354 "at91_twi", 0, 355 AT91RM92_BASE + AT91RM92_TWI_BASE, AT91RM92_TWI_SIZE, 356 AT91RM92_IRQ_TWI 357 }, 358 { 359 "ate", 0, 360 AT91RM92_BASE + AT91RM92_EMAC_BASE, AT91RM92_EMAC_SIZE, 361 AT91RM92_IRQ_EMAC 362 }, 363 #ifndef SKYEYE_WORKAROUNDS 364 { 365 "uart", 0, 366 AT91RM92_BASE + AT91RM92_DBGU_BASE, AT91RM92_DBGU_SIZE, 367 AT91RM92_IRQ_SYSTEM 368 }, 369 { 370 "uart", 1, 371 AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, 372 AT91RM92_IRQ_USART0 373 }, 374 { 375 "uart", 2, 376 AT91RM92_BASE + AT91RM92_USART1_BASE, AT91RM92_USART_SIZE, 377 AT91RM92_IRQ_USART1 378 }, 379 { 380 "uart", 3, 381 AT91RM92_BASE + AT91RM92_USART2_BASE, AT91RM92_USART_SIZE, 382 AT91RM92_IRQ_USART2 383 }, 384 { 385 "uart", 4, 386 AT91RM92_BASE + AT91RM92_USART3_BASE, AT91RM92_USART_SIZE, 387 AT91RM92_IRQ_USART3 388 }, 389 #else 390 { 391 "uart", 0, 392 AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, 393 AT91RM92_IRQ_USART0 394 }, 395 #endif 396 { 397 "at91_ssc", 0, 398 AT91RM92_BASE + AT91RM92_SSC0_BASE, AT91RM92_SSC_SIZE, 399 AT91RM92_IRQ_SSC0 400 }, 401 { 402 "at91_ssc", 1, 403 AT91RM92_BASE + AT91RM92_SSC1_BASE, AT91RM92_SSC_SIZE, 404 AT91RM92_IRQ_SSC1 405 }, 406 { 407 "at91_ssc", 2, 408 AT91RM92_BASE + AT91RM92_SSC2_BASE, AT91RM92_SSC_SIZE, 409 AT91RM92_IRQ_SSC2 410 }, 411 { 412 "spi", 0, 413 AT91RM92_BASE + AT91RM92_SPI_BASE, AT91RM92_SPI_SIZE, 414 AT91RM92_IRQ_SPI 415 }, 416 { 417 "ohci", 0, 418 AT91RM92_OHCI_BASE, AT91RM92_OHCI_SIZE, 419 AT91RM92_IRQ_UHP 420 }, 421 { 422 "at91_cfata", 0, 423 AT91RM92_CF_BASE, AT91RM92_CF_SIZE, 424 -1 425 }, 426 { 0, 0, 0, 0, 0 } 427 }; 428 429 static void 430 at91_cpu_add_builtin_children(device_t dev, struct at91_softc *sc) 431 { 432 int i; 433 struct cpu_devs *walker; 434 435 // XXX should look at the device id in the DBGU register and 436 // XXX based on the CPU load in these devices 437 for (i = 0, walker = at91rm9200_devs; walker->name; i++, walker++) { 438 at91_add_child(dev, i, walker->name, walker->unit, 439 walker->mem_base, walker->mem_len, walker->irq0, 440 walker->irq1, walker->irq2); 441 } 442 } 443 444 #define NORMDEV 50 445 446 /* 447 * Standard priority levels for the system. 0 is lowest and 7 is highest. 448 * These values are the ones Atmel uses for its Linux port, which differ 449 * a little form the ones that are in the standard distribution. Also, 450 * the ones marked with 'TWEEK' are different based on experience. 451 */ 452 static int irq_prio[32] = 453 { 454 7, /* Advanced Interrupt Controller (FIQ) */ 455 7, /* System Peripherals */ 456 1, /* Parallel IO Controller A */ 457 1, /* Parallel IO Controller B */ 458 1, /* Parallel IO Controller C */ 459 1, /* Parallel IO Controller D */ 460 5, /* USART 0 */ 461 5, /* USART 1 */ 462 5, /* USART 2 */ 463 5, /* USART 3 */ 464 0, /* Multimedia Card Interface */ 465 2, /* USB Device Port */ 466 4, /* Two-Wire Interface */ /* TWEEK */ 467 5, /* Serial Peripheral Interface */ 468 4, /* Serial Synchronous Controller 0 */ 469 6, /* Serial Synchronous Controller 1 */ /* TWEEK */ 470 4, /* Serial Synchronous Controller 2 */ 471 0, /* Timer Counter 0 */ 472 6, /* Timer Counter 1 */ /* TWEEK */ 473 0, /* Timer Counter 2 */ 474 0, /* Timer Counter 3 */ 475 0, /* Timer Counter 4 */ 476 0, /* Timer Counter 5 */ 477 2, /* USB Host port */ 478 3, /* Ethernet MAC */ 479 0, /* Advanced Interrupt Controller (IRQ0) */ 480 0, /* Advanced Interrupt Controller (IRQ1) */ 481 0, /* Advanced Interrupt Controller (IRQ2) */ 482 0, /* Advanced Interrupt Controller (IRQ3) */ 483 0, /* Advanced Interrupt Controller (IRQ4) */ 484 0, /* Advanced Interrupt Controller (IRQ5) */ 485 0 /* Advanced Interrupt Controller (IRQ6) */ 486 }; 487 488 static int 489 at91_attach(device_t dev) 490 { 491 struct at91_softc *sc = device_get_softc(dev); 492 int i; 493 494 at91_softc = sc; 495 sc->sc_st = &at91_bs_tag; 496 sc->sc_sh = AT91RM92_BASE; 497 sc->dev = dev; 498 if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE, 499 AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0) 500 panic("Enable to map IRQ registers"); 501 sc->sc_irq_rman.rm_type = RMAN_ARRAY; 502 sc->sc_irq_rman.rm_descr = "AT91 IRQs"; 503 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 504 sc->sc_mem_rman.rm_descr = "AT91 Memory"; 505 if (rman_init(&sc->sc_irq_rman) != 0 || 506 rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) 507 panic("at91_attach: failed to set up IRQ rman"); 508 if (rman_init(&sc->sc_mem_rman) != 0 || 509 rman_manage_region(&sc->sc_mem_rman, 0xdff00000ul, 510 0xdffffffful) != 0) 511 panic("at91_attach: failed to set up memory rman"); 512 if (rman_manage_region(&sc->sc_mem_rman, AT91RM92_OHCI_BASE, 513 AT91RM92_OHCI_BASE + AT91RM92_OHCI_SIZE - 1) != 0) 514 panic("at91_attach: failed to set up ohci memory"); 515 if (rman_manage_region(&sc->sc_mem_rman, AT91RM92_CF_BASE, 516 AT91RM92_CF_BASE + AT91RM92_CF_SIZE - 1) != 0) 517 panic("at91_attach: failed to set up CompactFlash ATA memory"); 518 519 for (i = 0; i < 32; i++) { 520 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SVR + 521 i * 4, i); 522 /* Priority. */ 523 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SMR + i * 4, 524 irq_prio[i]); 525 if (i < 8) 526 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_EOICR, 527 1); 528 } 529 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SPU, 32); 530 /* No debug. */ 531 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_DCR, 0); 532 /* Disable and clear all interrupts. */ 533 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff); 534 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff); 535 536 /* XXX */ 537 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ 538 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); 539 /* DIsable all interrupts for DBGU */ 540 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff); 541 /* Disable all interrupts for the SDRAM controller */ 542 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); 543 544 at91_cpu_add_builtin_children(dev, sc); 545 546 bus_generic_probe(dev); 547 bus_generic_attach(dev); 548 enable_interrupts(I32_bit | F32_bit); 549 return (0); 550 } 551 552 static struct resource * 553 at91_alloc_resource(device_t dev, device_t child, int type, int *rid, 554 u_long start, u_long end, u_long count, u_int flags) 555 { 556 struct at91_softc *sc = device_get_softc(dev); 557 struct resource_list_entry *rle; 558 struct at91_ivar *ivar = device_get_ivars(child); 559 struct resource_list *rl = &ivar->resources; 560 561 if (device_get_parent(child) != dev) 562 return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 563 type, rid, start, end, count, flags)); 564 565 rle = resource_list_find(rl, type, *rid); 566 if (rle == NULL) 567 return (NULL); 568 if (rle->res) 569 panic("Resource rid %d type %d already in use", *rid, type); 570 if (start == 0UL && end == ~0UL) { 571 start = rle->start; 572 count = ulmax(count, rle->count); 573 end = ulmax(rle->end, start + count - 1); 574 } 575 switch (type) 576 { 577 case SYS_RES_IRQ: 578 rle->res = rman_reserve_resource(&sc->sc_irq_rman, 579 start, end, count, flags, child); 580 break; 581 case SYS_RES_MEMORY: 582 rle->res = rman_reserve_resource(&sc->sc_mem_rman, 583 start, end, count, flags, child); 584 if (rle->res != NULL) { 585 rman_set_bustag(rle->res, &at91_bs_tag); 586 rman_set_bushandle(rle->res, start); 587 } 588 break; 589 } 590 if (rle->res) { 591 rle->start = rman_get_start(rle->res); 592 rle->end = rman_get_end(rle->res); 593 rle->count = count; 594 rman_set_rid(rle->res, *rid); 595 } 596 return (rle->res); 597 } 598 599 static struct resource_list * 600 at91_get_resource_list(device_t dev, device_t child) 601 { 602 struct at91_ivar *ivar; 603 604 ivar = device_get_ivars(child); 605 return (&(ivar->resources)); 606 } 607 608 static int 609 at91_release_resource(device_t dev, device_t child, int type, 610 int rid, struct resource *r) 611 { 612 struct resource_list *rl; 613 struct resource_list_entry *rle; 614 615 rl = at91_get_resource_list(dev, child); 616 if (rl == NULL) 617 return (EINVAL); 618 rle = resource_list_find(rl, type, rid); 619 if (rle == NULL) 620 return (EINVAL); 621 rman_release_resource(r); 622 rle->res = NULL; 623 return (0); 624 } 625 626 static int 627 at91_setup_intr(device_t dev, device_t child, 628 struct resource *ires, int flags, driver_filter_t *filt, 629 driver_intr_t *intr, void *arg, void **cookiep) 630 { 631 struct at91_softc *sc = device_get_softc(dev); 632 633 if (rman_get_start(ires) == AT91RM92_IRQ_SYSTEM && filt == NULL) 634 panic("All system interrupt ISRs must be FILTER"); 635 BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt, 636 intr, arg, cookiep); 637 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IECR, 638 1 << rman_get_start(ires)); 639 return (0); 640 } 641 642 static int 643 at91_teardown_intr(device_t dev, device_t child, struct resource *res, 644 void *cookie) 645 { 646 struct at91_softc *sc = device_get_softc(dev); 647 648 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 649 1 << rman_get_start(res)); 650 return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); 651 } 652 653 static int 654 at91_activate_resource(device_t bus, device_t child, int type, int rid, 655 struct resource *r) 656 { 657 #if 0 658 u_long p; 659 int error; 660 661 if (type == SYS_RES_MEMORY) { 662 error = bus_space_map(rman_get_bustag(r), 663 rman_get_bushandle(r), rman_get_size(r), 0, &p); 664 if (error) 665 return (error); 666 rman_set_bushandle(r, p); 667 } 668 #endif 669 return (rman_activate_resource(r)); 670 } 671 672 static int 673 at91_print_child(device_t dev, device_t child) 674 { 675 struct at91_ivar *ivars; 676 struct resource_list *rl; 677 int retval = 0; 678 679 ivars = device_get_ivars(child); 680 rl = &ivars->resources; 681 682 retval += bus_print_child_header(dev, child); 683 684 retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx"); 685 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 686 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 687 if (device_get_flags(dev)) 688 retval += printf(" flags %#x", device_get_flags(dev)); 689 690 retval += bus_print_child_footer(dev, child); 691 692 return (retval); 693 } 694 695 void 696 arm_mask_irq(uintptr_t nb) 697 { 698 699 bus_space_write_4(at91_softc->sc_st, 700 at91_softc->sc_sys_sh, IC_IDCR, 1 << nb); 701 702 } 703 704 int 705 arm_get_next_irq(int last __unused) 706 { 707 int status; 708 int irq; 709 710 irq = bus_space_read_4(at91_softc->sc_st, 711 at91_softc->sc_sys_sh, IC_IVR); 712 status = bus_space_read_4(at91_softc->sc_st, 713 at91_softc->sc_sys_sh, IC_ISR); 714 if (status == 0) { 715 bus_space_write_4(at91_softc->sc_st, 716 at91_softc->sc_sys_sh, IC_EOICR, 1); 717 return (-1); 718 } 719 return (irq); 720 } 721 722 void 723 arm_unmask_irq(uintptr_t nb) 724 { 725 726 bus_space_write_4(at91_softc->sc_st, 727 at91_softc->sc_sys_sh, IC_IECR, 1 << nb); 728 bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, 729 IC_EOICR, 0); 730 731 } 732 733 static void 734 at91_eoi(void *unused) 735 { 736 bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, 737 IC_EOICR, 0); 738 } 739 740 static device_method_t at91_methods[] = { 741 DEVMETHOD(device_probe, at91_probe), 742 DEVMETHOD(device_attach, at91_attach), 743 DEVMETHOD(device_identify, at91_identify), 744 745 DEVMETHOD(bus_alloc_resource, at91_alloc_resource), 746 DEVMETHOD(bus_setup_intr, at91_setup_intr), 747 DEVMETHOD(bus_teardown_intr, at91_teardown_intr), 748 DEVMETHOD(bus_activate_resource, at91_activate_resource), 749 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 750 DEVMETHOD(bus_get_resource_list,at91_get_resource_list), 751 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 752 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 753 DEVMETHOD(bus_release_resource, at91_release_resource), 754 DEVMETHOD(bus_print_child, at91_print_child), 755 756 {0, 0}, 757 }; 758 759 static driver_t at91_driver = { 760 "atmelarm", 761 at91_methods, 762 sizeof(struct at91_softc), 763 }; 764 static devclass_t at91_devclass; 765 766 DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0);
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