The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/at91/at91_machdep.c

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    1 /*-
    2  * Copyright (c) 1994-1998 Mark Brinicombe.
    3  * Copyright (c) 1994 Brini.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software written for Brini by Mark Brinicombe
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Brini.
   19  * 4. The name of the company nor the name of the author may be used to
   20  *    endorse or promote products derived from this software without specific
   21  *    prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   26  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  *
   35  * RiscBSD kernel project
   36  *
   37  * machdep.c
   38  *
   39  * Machine dependant functions for kernel setup
   40  *
   41  * This file needs a lot of work.
   42  *
   43  * Created      : 17/09/94
   44  */
   45 
   46 #include "opt_msgbuf.h"
   47 
   48 #include <sys/cdefs.h>
   49 __FBSDID("$FreeBSD: releng/8.1/sys/arm/at91/at91_machdep.c 195256 2009-07-01 20:07:44Z raj $");
   50 
   51 #define _ARM32_BUS_DMA_PRIVATE
   52 #include <sys/param.h>
   53 #include <sys/systm.h>
   54 #include <sys/sysproto.h>
   55 #include <sys/signalvar.h>
   56 #include <sys/imgact.h>
   57 #include <sys/kernel.h>
   58 #include <sys/ktr.h>
   59 #include <sys/linker.h>
   60 #include <sys/lock.h>
   61 #include <sys/malloc.h>
   62 #include <sys/mutex.h>
   63 #include <sys/pcpu.h>
   64 #include <sys/proc.h>
   65 #include <sys/ptrace.h>
   66 #include <sys/cons.h>
   67 #include <sys/bio.h>
   68 #include <sys/bus.h>
   69 #include <sys/buf.h>
   70 #include <sys/exec.h>
   71 #include <sys/kdb.h>
   72 #include <sys/msgbuf.h>
   73 #include <machine/reg.h>
   74 #include <machine/cpu.h>
   75 
   76 #include <vm/vm.h>
   77 #include <vm/pmap.h>
   78 #include <vm/vm_object.h>
   79 #include <vm/vm_page.h>
   80 #include <vm/vm_pager.h>
   81 #include <vm/vm_map.h>
   82 #include <vm/vnode_pager.h>
   83 #include <machine/pmap.h>
   84 #include <machine/vmparam.h>
   85 #include <machine/pcb.h>
   86 #include <machine/undefined.h>
   87 #include <machine/machdep.h>
   88 #include <machine/metadata.h>
   89 #include <machine/armreg.h>
   90 #include <machine/bus.h>
   91 #include <sys/reboot.h>
   92 
   93 #include <arm/at91/at91board.h>
   94 #include <arm/at91/at91rm92reg.h>
   95 #include <arm/at91/at91_piovar.h>
   96 #include <arm/at91/at91_pio_rm9200.h>
   97 
   98 #define KERNEL_PT_SYS           0       /* Page table for mapping proc0 zero page */
   99 #define KERNEL_PT_KERN          1
  100 #define KERNEL_PT_KERN_NUM      22
  101 #define KERNEL_PT_AFKERNEL      KERNEL_PT_KERN + KERNEL_PT_KERN_NUM     /* L2 table for mapping after kernel */
  102 #define KERNEL_PT_AFKERNEL_NUM  5
  103 
  104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  105 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  106 
  107 /* Define various stack sizes in pages */
  108 #define IRQ_STACK_SIZE  1
  109 #define ABT_STACK_SIZE  1
  110 #define UND_STACK_SIZE  1
  111 
  112 extern u_int data_abort_handler_address;
  113 extern u_int prefetch_abort_handler_address;
  114 extern u_int undefined_handler_address;
  115 
  116 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  117 
  118 extern void *_end;
  119 
  120 extern int *end;
  121 
  122 struct pcpu __pcpu;
  123 struct pcpu *pcpup = &__pcpu;
  124 
  125 /* Physical and virtual addresses for some global pages */
  126 
  127 vm_paddr_t phys_avail[10];
  128 vm_paddr_t dump_avail[4];
  129 vm_offset_t physical_pages;
  130 
  131 struct pv_addr systempage;
  132 struct pv_addr msgbufpv;
  133 struct pv_addr irqstack;
  134 struct pv_addr undstack;
  135 struct pv_addr abtstack;
  136 struct pv_addr kernelstack;
  137 
  138 static void *boot_arg1;
  139 static void *boot_arg2;
  140 
  141 static struct trapframe proc0_tf;
  142 
  143 /* Static device mappings. */
  144 static const struct pmap_devmap at91rm9200_devmap[] = {
  145         /*
  146          * Map the on-board devices VA == PA so that we can access them
  147          * with the MMU on or off.
  148          */
  149         {
  150                 /*
  151                  * This at least maps the interrupt controller, the UART
  152                  * and the timer. Other devices should use newbus to
  153                  * map their memory anyway.
  154                  */
  155                 0xdff00000,
  156                 0xfff00000,
  157                 0x100000,
  158                 VM_PROT_READ|VM_PROT_WRITE,
  159                 PTE_NOCACHE,
  160         },
  161         /*
  162          * We can't just map the OHCI registers VA == PA, because
  163          * AT91RM92_OHCI_BASE belongs to the userland address space.
  164          * We could just choose a different virtual address, but a better
  165          * solution would probably be to just use pmap_mapdev() to allocate
  166          * KVA, as we don't need the OHCI controller before the vm
  167          * initialization is done. However, the AT91 resource allocation
  168          * system doesn't know how to use pmap_mapdev() yet.
  169          */
  170         {
  171                 /*
  172                  * Add the ohci controller, and anything else that might be
  173                  * on this chip select for a VA/PA mapping.
  174                  */
  175                 AT91RM92_OHCI_BASE,
  176                 AT91RM92_OHCI_PA_BASE,
  177                 AT91RM92_OHCI_SIZE,
  178                 VM_PROT_READ|VM_PROT_WRITE,
  179                 PTE_NOCACHE,
  180         },
  181         {
  182                 /* CompactFlash controller. */
  183                 AT91RM92_CF_BASE,
  184                 AT91RM92_CF_PA_BASE,
  185                 AT91RM92_CF_SIZE,
  186                 VM_PROT_READ|VM_PROT_WRITE,
  187                 PTE_NOCACHE,
  188         },
  189         {
  190                 0,
  191                 0,
  192                 0,
  193                 0,
  194                 0,
  195         }
  196 };
  197 
  198 long
  199 at91_ramsize(void)
  200 {
  201         uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE);
  202         uint32_t cr, mr;
  203         int banks, rows, cols, bw;
  204 
  205         cr = SDRAMC[AT91RM92_SDRAMC_CR / 4];
  206         mr = SDRAMC[AT91RM92_SDRAMC_MR / 4];
  207         bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2;
  208         banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1;
  209         rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11;
  210         cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8;
  211         return (1 << (cols + rows + banks + bw));
  212 }
  213 
  214 void *
  215 initarm(void *arg, void *arg2)
  216 {
  217         struct pv_addr  kernel_l1pt;
  218         struct pv_addr  dpcpu;
  219         int loop, i;
  220         u_int l1pagetable;
  221         vm_offset_t freemempos;
  222         vm_offset_t afterkern;
  223         uint32_t memsize;
  224         vm_offset_t lastaddr;
  225 
  226         boot_arg1 = arg;
  227         boot_arg2 = arg2;
  228         set_cpufuncs();
  229         lastaddr = fake_preload_metadata();
  230         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  231         PCPU_SET(curthread, &thread0);
  232 
  233         freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
  234         /* Define a macro to simplify memory allocation */
  235 #define valloc_pages(var, np)                   \
  236         alloc_pages((var).pv_va, (np));         \
  237         (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
  238 
  239 #define alloc_pages(var, np)                    \
  240         (var) = freemempos;             \
  241         freemempos += (np * PAGE_SIZE);         \
  242         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  243 
  244         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  245                 freemempos += PAGE_SIZE;
  246         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  247         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  248                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  249                         valloc_pages(kernel_pt_table[loop],
  250                             L2_TABLE_SIZE / PAGE_SIZE);
  251                 } else {
  252                         kernel_pt_table[loop].pv_va = freemempos -
  253                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  254                             L2_TABLE_SIZE_REAL;
  255                         kernel_pt_table[loop].pv_pa =
  256                             kernel_pt_table[loop].pv_va - KERNVIRTADDR +
  257                             KERNPHYSADDR;
  258                 }
  259                 i++;
  260         }
  261         /*
  262          * Allocate a page for the system page mapped to V0x00000000
  263          * This page will just contain the system vectors and can be
  264          * shared by all processes.
  265          */
  266         valloc_pages(systempage, 1);
  267 
  268         /* Allocate dynamic per-cpu area. */
  269         valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
  270         dpcpu_init((void *)dpcpu.pv_va, 0);
  271 
  272         /* Allocate stacks for all modes */
  273         valloc_pages(irqstack, IRQ_STACK_SIZE);
  274         valloc_pages(abtstack, ABT_STACK_SIZE);
  275         valloc_pages(undstack, UND_STACK_SIZE);
  276         valloc_pages(kernelstack, KSTACK_PAGES);
  277         valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
  278 
  279         /*
  280          * Now we start construction of the L1 page table
  281          * We start by mapping the L2 page tables into the L1.
  282          * This means that we can replace L1 mappings later on if necessary
  283          */
  284         l1pagetable = kernel_l1pt.pv_va;
  285 
  286         /* Map the L2 pages tables in the L1 page table */
  287         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
  288             &kernel_pt_table[KERNEL_PT_SYS]);
  289         for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
  290                 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
  291                     &kernel_pt_table[KERNEL_PT_KERN + i]);
  292         pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
  293            (((uint32_t)lastaddr - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
  294             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  295         afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE - 1));
  296         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  297                 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
  298                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  299         }
  300 
  301         /* Map the vector page. */
  302         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  303             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  304 
  305         /* Map the DPCPU pages */
  306         pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, DPCPU_SIZE,
  307             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  308 
  309         /* Map the stack pages */
  310         pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
  311             IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  312         pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
  313             ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  314         pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
  315             UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  316         pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
  317             KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  318 
  319         pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
  320             L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  321         pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
  322             MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  323 
  324         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  325                 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
  326                     kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
  327                     VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  328         }
  329 
  330         pmap_devmap_bootstrap(l1pagetable, at91rm9200_devmap);
  331         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  332         setttb(kernel_l1pt.pv_pa);
  333         cpu_tlb_flushID();
  334         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  335         cninit();
  336         memsize = board_init();
  337         physmem = memsize / PAGE_SIZE;
  338 
  339         /*
  340          * Pages were allocated during the secondary bootstrap for the
  341          * stacks for different CPU modes.
  342          * We must now set the r13 registers in the different CPU modes to
  343          * point to these stacks.
  344          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  345          * of the stack memory.
  346          */
  347         cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
  348         set_stackptr(PSR_IRQ32_MODE,
  349             irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
  350         set_stackptr(PSR_ABT32_MODE,
  351             abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
  352         set_stackptr(PSR_UND32_MODE,
  353             undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
  354 
  355         /*
  356          * We must now clean the cache again....
  357          * Cleaning may be done by reading new data to displace any
  358          * dirty data in the cache. This will have happened in setttb()
  359          * but since we are boot strapping the addresses used for the read
  360          * may have just been remapped and thus the cache could be out
  361          * of sync. A re-clean after the switch will cure this.
  362          * After booting there are no gross relocations of the kernel thus
  363          * this problem will not occur after initarm().
  364          */
  365         cpu_idcache_wbinv_all();
  366 
  367         /* Set stack for exception handlers */
  368 
  369         data_abort_handler_address = (u_int)data_abort_handler;
  370         prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
  371         undefined_handler_address = (u_int)undefinedinstruction_bounce;
  372         undefined_init();
  373 
  374         proc_linkup0(&proc0, &thread0);
  375         thread0.td_kstack = kernelstack.pv_va;
  376         thread0.td_pcb = (struct pcb *)
  377                 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
  378         thread0.td_pcb->pcb_flags = 0;
  379         thread0.td_frame = &proc0_tf;
  380         pcpup->pc_curpcb = thread0.td_pcb;
  381 
  382         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  383 
  384         pmap_curmaxkvaddr = afterkern + L1_S_SIZE * (KERNEL_PT_KERN_NUM - 1);
  385 
  386         /*
  387          * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
  388          * calling pmap_bootstrap.
  389          */
  390         dump_avail[0] = PHYSADDR;
  391         dump_avail[1] = PHYSADDR + memsize;
  392         dump_avail[2] = 0;
  393         dump_avail[3] = 0;
  394 
  395         pmap_bootstrap(freemempos,
  396             KERNVIRTADDR + 3 * memsize,
  397             &kernel_l1pt);
  398         msgbufp = (void*)msgbufpv.pv_va;
  399         msgbufinit(msgbufp, MSGBUF_SIZE);
  400         mutex_init();
  401 
  402         i = 0;
  403 #if PHYSADDR != KERNPHYSADDR
  404         phys_avail[i++] = PHYSADDR;
  405         phys_avail[i++] = KERNPHYSADDR;
  406 #endif
  407         phys_avail[i++] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR;
  408         phys_avail[i++] = PHYSADDR + memsize;
  409         phys_avail[i++] = 0;
  410         phys_avail[i++] = 0;
  411         /* Do basic tuning, hz etc */
  412         init_param1();
  413         init_param2(physmem);
  414         kdb_init();
  415         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  416             sizeof(struct pcb)));
  417 }

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