1 /*-
2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD: releng/8.1/sys/arm/at91/at91_twi.c 194015 2009-06-11 17:05:13Z avg $");
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bus.h>
32 #include <sys/conf.h>
33 #include <sys/kernel.h>
34 #include <sys/lock.h>
35 #include <sys/mbuf.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
39 #include <sys/rman.h>
40 #include <machine/bus.h>
41
42 #include <arm/at91/at91rm92reg.h>
43 #include <arm/at91/at91_twireg.h>
44 #include <arm/at91/at91var.h>
45
46 #include <dev/iicbus/iiconf.h>
47 #include <dev/iicbus/iicbus.h>
48 #include "iicbus_if.h"
49
50 #define TWI_SLOW_CLOCK 1500
51 #define TWI_FAST_CLOCK 45000
52 #define TWI_FASTEST_CLOCK 90000
53
54 struct at91_twi_softc
55 {
56 device_t dev; /* Myself */
57 void *intrhand; /* Interrupt handle */
58 struct resource *irq_res; /* IRQ resource */
59 struct resource *mem_res; /* Memory resource */
60 struct mtx sc_mtx; /* basically a perimeter lock */
61 volatile uint32_t flags;
62 uint32_t cwgr;
63 int sc_started;
64 int twi_addr;
65 device_t iicbus;
66 };
67
68 static inline uint32_t
69 RD4(struct at91_twi_softc *sc, bus_size_t off)
70 {
71 return bus_read_4(sc->mem_res, off);
72 }
73
74 static inline void
75 WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
76 {
77 bus_write_4(sc->mem_res, off, val);
78 }
79
80 #define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
81 #define AT91_TWI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
82 #define AT91_TWI_LOCK_INIT(_sc) \
83 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
84 "twi", MTX_DEF)
85 #define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
86 #define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
87 #define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
88 #define TWI_DEF_CLK 100000
89
90 static devclass_t at91_twi_devclass;
91
92 /* bus entry points */
93
94 static int at91_twi_probe(device_t dev);
95 static int at91_twi_attach(device_t dev);
96 static int at91_twi_detach(device_t dev);
97 static void at91_twi_intr(void *);
98
99 /* helper routines */
100 static int at91_twi_activate(device_t dev);
101 static void at91_twi_deactivate(device_t dev);
102
103 static int
104 at91_twi_probe(device_t dev)
105 {
106 device_set_desc(dev, "TWI");
107 return (0);
108 }
109
110 static int
111 at91_twi_attach(device_t dev)
112 {
113 struct at91_twi_softc *sc = device_get_softc(dev);
114 int err;
115
116 sc->dev = dev;
117 err = at91_twi_activate(dev);
118 if (err)
119 goto out;
120
121 AT91_TWI_LOCK_INIT(sc);
122
123 /*
124 * Activate the interrupt
125 */
126 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
127 NULL, at91_twi_intr, sc, &sc->intrhand);
128 if (err) {
129 AT91_TWI_LOCK_DESTROY(sc);
130 goto out;
131 }
132 sc->cwgr = TWI_CWGR_CKDIV(8 * at91_master_clock / TWI_FASTEST_CLOCK) |
133 TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
134 TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
135 WR4(sc, TWI_CR, TWI_CR_SWRST);
136 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
137 WR4(sc, TWI_CWGR, sc->cwgr);
138
139 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
140 device_printf(dev, "could not allocate iicbus instance\n");
141 /* probe and attach the iicbus */
142 bus_generic_attach(dev);
143 out:;
144 if (err)
145 at91_twi_deactivate(dev);
146 return (err);
147 }
148
149 static int
150 at91_twi_detach(device_t dev)
151 {
152 struct at91_twi_softc *sc;
153 int rv;
154
155 sc = device_get_softc(dev);
156 at91_twi_deactivate(dev);
157 if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
158 return (rv);
159
160 AT91_TWI_LOCK_DESTROY(sc);
161
162 return (0);
163 }
164
165 static int
166 at91_twi_activate(device_t dev)
167 {
168 struct at91_twi_softc *sc;
169 int rid;
170
171 sc = device_get_softc(dev);
172 rid = 0;
173 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
174 RF_ACTIVE);
175 if (sc->mem_res == NULL)
176 goto errout;
177 rid = 0;
178 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
179 RF_ACTIVE);
180 if (sc->irq_res == NULL)
181 goto errout;
182 return (0);
183 errout:
184 at91_twi_deactivate(dev);
185 return (ENOMEM);
186 }
187
188 static void
189 at91_twi_deactivate(device_t dev)
190 {
191 struct at91_twi_softc *sc;
192
193 sc = device_get_softc(dev);
194 if (sc->intrhand)
195 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
196 sc->intrhand = 0;
197 bus_generic_detach(sc->dev);
198 if (sc->mem_res)
199 bus_release_resource(dev, SYS_RES_MEMORY,
200 rman_get_rid(sc->mem_res), sc->mem_res);
201 sc->mem_res = 0;
202 if (sc->irq_res)
203 bus_release_resource(dev, SYS_RES_IRQ,
204 rman_get_rid(sc->irq_res), sc->irq_res);
205 sc->irq_res = 0;
206 return;
207 }
208
209 static void
210 at91_twi_intr(void *xsc)
211 {
212 struct at91_twi_softc *sc = xsc;
213 uint32_t status;
214
215 status = RD4(sc, TWI_SR);
216 if (status == 0)
217 return;
218 AT91_TWI_LOCK(sc);
219 sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK);
220 if (status & TWI_SR_RXRDY)
221 sc->flags |= TWI_SR_RXRDY;
222 if (status & TWI_SR_TXRDY)
223 sc->flags |= TWI_SR_TXRDY;
224 if (status & TWI_SR_TXCOMP)
225 sc->flags |= TWI_SR_TXCOMP;
226 WR4(sc, TWI_IDR, status);
227 wakeup(sc);
228 AT91_TWI_UNLOCK(sc);
229 return;
230 }
231
232 static int
233 at91_twi_wait(struct at91_twi_softc *sc, uint32_t bit)
234 {
235 int err = 0;
236 int counter = 100000;
237 uint32_t sr;
238
239 AT91_TWI_ASSERT_LOCKED(sc);
240 while (!((sr = RD4(sc, TWI_SR)) & bit) && counter-- > 0 &&
241 !(sr & TWI_SR_NACK))
242 continue;
243 if (counter <= 0)
244 err = EBUSY;
245 else if (sr & TWI_SR_NACK)
246 err = ENXIO; // iic nack convention
247 return (err);
248 }
249
250 static int
251 at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
252 {
253 struct at91_twi_softc *sc;
254 int clk;
255
256 sc = device_get_softc(dev);
257 AT91_TWI_LOCK(sc);
258 if (oldaddr)
259 *oldaddr = sc->twi_addr;
260 sc->twi_addr = addr;
261
262 /*
263 * speeds are for 1.5kb/s, 45kb/s and 90kb/s.
264 */
265 switch (speed) {
266 case IIC_SLOW:
267 clk = TWI_SLOW_CLOCK;
268 break;
269
270 case IIC_FAST:
271 clk = TWI_FAST_CLOCK;
272 break;
273
274 case IIC_UNKNOWN:
275 case IIC_FASTEST:
276 default:
277 clk = TWI_FASTEST_CLOCK;
278 break;
279 }
280 sc->cwgr = TWI_CWGR_CKDIV(1) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(clk)) |
281 TWI_CWGR_CLDIV(TWI_CWGR_DIV(clk));
282 WR4(sc, TWI_CR, TWI_CR_SWRST);
283 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
284 WR4(sc, TWI_CWGR, sc->cwgr);
285 printf("setting cwgr to %#x\n", sc->cwgr);
286 AT91_TWI_UNLOCK(sc);
287
288 return 0;
289 }
290
291 static int
292 at91_twi_callback(device_t dev, int index, caddr_t data)
293 {
294 int error = 0;
295
296 switch (index) {
297 case IIC_REQUEST_BUS:
298 break;
299
300 case IIC_RELEASE_BUS:
301 break;
302
303 default:
304 error = EINVAL;
305 }
306
307 return (error);
308 }
309
310 static int
311 at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
312 {
313 struct at91_twi_softc *sc;
314 int i, len, err;
315 uint32_t rdwr;
316 uint8_t *buf;
317 uint32_t sr;
318
319 sc = device_get_softc(dev);
320 err = 0;
321 AT91_TWI_LOCK(sc);
322 for (i = 0; i < nmsgs; i++) {
323 /*
324 * The linux atmel driver doesn't use the internal device
325 * address feature of twi. A separate i2c message needs to
326 * be written to use this.
327 * See http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
328 * for details. Upon reflection, we could use this as an
329 * optimization, but it is unclear the code bloat will
330 * result in faster/better operations.
331 */
332 rdwr = (msgs[i].flags & IIC_M_RD) ? TWI_MMR_MREAD : 0;
333 WR4(sc, TWI_MMR, TWI_MMR_DADR(msgs[i].slave) | rdwr);
334 len = msgs[i].len;
335 buf = msgs[i].buf;
336 /* zero byte transfers aren't allowed */
337 if (len == 0 || buf == NULL) {
338 err = EINVAL;
339 goto out;
340 }
341 if (len == 1)
342 WR4(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
343 else
344 WR4(sc, TWI_CR, TWI_CR_START);
345 if (msgs[i].flags & IIC_M_RD) {
346 sr = RD4(sc, TWI_SR);
347 while (!(sr & TWI_SR_TXCOMP)) {
348 if ((sr = RD4(sc, TWI_SR)) & TWI_SR_RXRDY) {
349 len--;
350 *buf++ = RD4(sc, TWI_RHR) & 0xff;
351 if (len == 0 && msgs[i].len != 1)
352 WR4(sc, TWI_CR, TWI_CR_STOP);
353 }
354 }
355 if (len > 0 || (sr & TWI_SR_NACK)) {
356 err = ENXIO; // iic nack convention
357 goto out;
358 }
359 } else {
360 while (len--) {
361 if (len == 0 && msgs[i].len != 1)
362 WR4(sc, TWI_CR, TWI_CR_STOP);
363 if ((err = at91_twi_wait(sc, TWI_SR_TXRDY)))
364 goto out;
365 WR4(sc, TWI_THR, *buf++);
366 }
367 }
368 if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
369 break;
370 }
371 out:;
372 if (err) {
373 WR4(sc, TWI_CR, TWI_CR_SWRST);
374 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
375 WR4(sc, TWI_CWGR, sc->cwgr);
376 }
377 AT91_TWI_UNLOCK(sc);
378 return (err);
379 }
380
381 static device_method_t at91_twi_methods[] = {
382 /* Device interface */
383 DEVMETHOD(device_probe, at91_twi_probe),
384 DEVMETHOD(device_attach, at91_twi_attach),
385 DEVMETHOD(device_detach, at91_twi_detach),
386
387 /* iicbus interface */
388 DEVMETHOD(iicbus_callback, at91_twi_callback),
389 DEVMETHOD(iicbus_reset, at91_twi_rst_card),
390 DEVMETHOD(iicbus_transfer, at91_twi_transfer),
391 { 0, 0 }
392 };
393
394 static driver_t at91_twi_driver = {
395 "at91_twi",
396 at91_twi_methods,
397 sizeof(struct at91_twi_softc),
398 };
399
400 DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, 0, 0);
401 DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, 0, 0);
402 MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);
Cache object: 483104c375ee2c5dc799b5091fdbde8f
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