The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/at91/at91_twi.c

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    1 /*-
    2  * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  */
   25 
   26 #include <sys/cdefs.h>
   27 __FBSDID("$FreeBSD: releng/9.0/sys/arm/at91/at91_twi.c 213496 2010-10-06 22:25:21Z cognet $");
   28 
   29 #include <sys/param.h>
   30 #include <sys/systm.h>
   31 #include <sys/bus.h>
   32 #include <sys/conf.h>
   33 #include <sys/kernel.h>
   34 #include <sys/lock.h>
   35 #include <sys/mbuf.h>
   36 #include <sys/malloc.h>
   37 #include <sys/module.h>
   38 #include <sys/mutex.h>
   39 #include <sys/rman.h>
   40 #include <machine/bus.h>
   41 
   42 #include <arm/at91/at91_twireg.h>
   43 #include <arm/at91/at91var.h>
   44 
   45 #include <dev/iicbus/iiconf.h>
   46 #include <dev/iicbus/iicbus.h>
   47 #include "iicbus_if.h"
   48 
   49 #define TWI_SLOW_CLOCK           1500
   50 #define TWI_FAST_CLOCK          45000
   51 #define TWI_FASTEST_CLOCK       90000
   52 
   53 struct at91_twi_softc
   54 {
   55         device_t dev;                   /* Myself */
   56         void *intrhand;                 /* Interrupt handle */
   57         struct resource *irq_res;       /* IRQ resource */
   58         struct resource *mem_res;       /* Memory resource */
   59         struct mtx sc_mtx;              /* basically a perimeter lock */
   60         volatile uint32_t flags;
   61         uint32_t cwgr;
   62         int     sc_started;
   63         int     twi_addr;
   64         device_t iicbus;
   65 };
   66 
   67 static inline uint32_t
   68 RD4(struct at91_twi_softc *sc, bus_size_t off)
   69 {
   70         return bus_read_4(sc->mem_res, off);
   71 }
   72 
   73 static inline void
   74 WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
   75 {
   76         bus_write_4(sc->mem_res, off, val);
   77 }
   78 
   79 #define AT91_TWI_LOCK(_sc)              mtx_lock(&(_sc)->sc_mtx)
   80 #define AT91_TWI_UNLOCK(_sc)            mtx_unlock(&(_sc)->sc_mtx)
   81 #define AT91_TWI_LOCK_INIT(_sc) \
   82         mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
   83             "twi", MTX_DEF)
   84 #define AT91_TWI_LOCK_DESTROY(_sc)      mtx_destroy(&_sc->sc_mtx);
   85 #define AT91_TWI_ASSERT_LOCKED(_sc)     mtx_assert(&_sc->sc_mtx, MA_OWNED);
   86 #define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
   87 #define TWI_DEF_CLK     100000
   88 
   89 static devclass_t at91_twi_devclass;
   90 
   91 /* bus entry points */
   92 
   93 static int at91_twi_probe(device_t dev);
   94 static int at91_twi_attach(device_t dev);
   95 static int at91_twi_detach(device_t dev);
   96 static void at91_twi_intr(void *);
   97 
   98 /* helper routines */
   99 static int at91_twi_activate(device_t dev);
  100 static void at91_twi_deactivate(device_t dev);
  101 
  102 static int
  103 at91_twi_probe(device_t dev)
  104 {
  105         device_set_desc(dev, "TWI");
  106         return (0);
  107 }
  108 
  109 static int
  110 at91_twi_attach(device_t dev)
  111 {
  112         struct at91_twi_softc *sc = device_get_softc(dev);
  113         int err;
  114 
  115         sc->dev = dev;
  116         err = at91_twi_activate(dev);
  117         if (err)
  118                 goto out;
  119 
  120         AT91_TWI_LOCK_INIT(sc);
  121 
  122         /*
  123          * Activate the interrupt
  124          */
  125         err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
  126             NULL, at91_twi_intr, sc, &sc->intrhand);
  127         if (err) {
  128                 AT91_TWI_LOCK_DESTROY(sc);
  129                 goto out;
  130         }
  131         sc->cwgr = TWI_CWGR_CKDIV(8 * at91_master_clock / TWI_FASTEST_CLOCK) |
  132             TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
  133             TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
  134         WR4(sc, TWI_CR, TWI_CR_SWRST);
  135         WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
  136         WR4(sc, TWI_CWGR, sc->cwgr);
  137 
  138         if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
  139                 device_printf(dev, "could not allocate iicbus instance\n");
  140         /* probe and attach the iicbus */
  141         bus_generic_attach(dev);
  142 out:;
  143         if (err)
  144                 at91_twi_deactivate(dev);
  145         return (err);
  146 }
  147 
  148 static int
  149 at91_twi_detach(device_t dev)
  150 {
  151         struct at91_twi_softc *sc;
  152         int rv;
  153 
  154         sc = device_get_softc(dev);
  155         at91_twi_deactivate(dev);
  156         if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
  157                 return (rv);
  158 
  159         AT91_TWI_LOCK_DESTROY(sc);
  160 
  161         return (0);
  162 }
  163 
  164 static int
  165 at91_twi_activate(device_t dev)
  166 {
  167         struct at91_twi_softc *sc;
  168         int rid;
  169 
  170         sc = device_get_softc(dev);
  171         rid = 0;
  172         sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  173             RF_ACTIVE);
  174         if (sc->mem_res == NULL)
  175                 goto errout;
  176         rid = 0;
  177         sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  178             RF_ACTIVE);
  179         if (sc->irq_res == NULL)
  180                 goto errout;
  181         return (0);
  182 errout:
  183         at91_twi_deactivate(dev);
  184         return (ENOMEM);
  185 }
  186 
  187 static void
  188 at91_twi_deactivate(device_t dev)
  189 {
  190         struct at91_twi_softc *sc;
  191 
  192         sc = device_get_softc(dev);
  193         if (sc->intrhand)
  194                 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
  195         sc->intrhand = 0;
  196         bus_generic_detach(sc->dev);
  197         if (sc->mem_res)
  198                 bus_release_resource(dev, SYS_RES_MEMORY,
  199                     rman_get_rid(sc->mem_res), sc->mem_res);
  200         sc->mem_res = 0;
  201         if (sc->irq_res)
  202                 bus_release_resource(dev, SYS_RES_IRQ,
  203                     rman_get_rid(sc->irq_res), sc->irq_res);
  204         sc->irq_res = 0;
  205         return;
  206 }
  207 
  208 static void
  209 at91_twi_intr(void *xsc)
  210 {
  211         struct at91_twi_softc *sc = xsc;
  212         uint32_t status;
  213 
  214         status = RD4(sc, TWI_SR);
  215         if (status == 0)
  216                 return;
  217         AT91_TWI_LOCK(sc);
  218         sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK);
  219         if (status & TWI_SR_RXRDY)
  220                 sc->flags |= TWI_SR_RXRDY;
  221         if (status & TWI_SR_TXRDY)
  222                 sc->flags |= TWI_SR_TXRDY;
  223         if (status & TWI_SR_TXCOMP)
  224                 sc->flags |= TWI_SR_TXCOMP;
  225         WR4(sc, TWI_IDR, status);
  226         wakeup(sc);
  227         AT91_TWI_UNLOCK(sc);
  228         return;
  229 }
  230 
  231 static int
  232 at91_twi_wait(struct at91_twi_softc *sc, uint32_t bit)
  233 {
  234         int err = 0;
  235         int counter = 100000;
  236         uint32_t sr;
  237 
  238         AT91_TWI_ASSERT_LOCKED(sc);
  239         while (!((sr = RD4(sc, TWI_SR)) & bit) && counter-- > 0 &&
  240             !(sr & TWI_SR_NACK))
  241                 continue;
  242         if (counter <= 0)
  243                 err = EBUSY;
  244         else if (sr & TWI_SR_NACK)
  245                 err = ENXIO;            // iic nack convention
  246         return (err);
  247 }
  248 
  249 static int
  250 at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
  251 {
  252         struct at91_twi_softc *sc;
  253         int clk;
  254 
  255         sc = device_get_softc(dev);
  256         AT91_TWI_LOCK(sc);
  257         if (oldaddr)
  258                 *oldaddr = sc->twi_addr;
  259         sc->twi_addr = addr;
  260 
  261         /*
  262          * speeds are for 1.5kb/s, 45kb/s and 90kb/s.
  263          */
  264         switch (speed) {
  265         case IIC_SLOW:
  266                 clk = TWI_SLOW_CLOCK;
  267                 break;
  268 
  269         case IIC_FAST:
  270                 clk = TWI_FAST_CLOCK;
  271                 break;
  272 
  273         case IIC_UNKNOWN:
  274         case IIC_FASTEST:
  275         default:
  276                 clk = TWI_FASTEST_CLOCK;
  277                 break;
  278         }
  279         sc->cwgr = TWI_CWGR_CKDIV(1) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(clk)) |
  280             TWI_CWGR_CLDIV(TWI_CWGR_DIV(clk));
  281         WR4(sc, TWI_CR, TWI_CR_SWRST);
  282         WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
  283         WR4(sc, TWI_CWGR, sc->cwgr);
  284         printf("setting cwgr to %#x\n", sc->cwgr);
  285         AT91_TWI_UNLOCK(sc);
  286 
  287         return 0;
  288 }
  289 
  290 static int
  291 at91_twi_callback(device_t dev, int index, caddr_t data)
  292 {
  293         int error = 0;
  294 
  295         switch (index) {
  296         case IIC_REQUEST_BUS:
  297                 break;
  298 
  299         case IIC_RELEASE_BUS:
  300                 break;
  301 
  302         default:
  303                 error = EINVAL;
  304         }
  305 
  306         return (error);
  307 }
  308 
  309 static int
  310 at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
  311 {
  312         struct at91_twi_softc *sc;
  313         int i, len, err;
  314         uint32_t rdwr;
  315         uint8_t *buf;
  316         uint32_t sr;
  317 
  318         sc = device_get_softc(dev);
  319         err = 0;
  320         AT91_TWI_LOCK(sc);
  321         for (i = 0; i < nmsgs; i++) {
  322                 /*
  323                  * The linux atmel driver doesn't use the internal device
  324                  * address feature of twi.  A separate i2c message needs to
  325                  * be written to use this.
  326                  * See http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
  327                  * for details.  Upon reflection, we could use this as an
  328                  * optimization, but it is unclear the code bloat will
  329                  * result in faster/better operations.
  330                  */
  331                 rdwr = (msgs[i].flags & IIC_M_RD) ? TWI_MMR_MREAD : 0;
  332                 WR4(sc, TWI_MMR, TWI_MMR_DADR(msgs[i].slave) | rdwr);
  333                 len = msgs[i].len;
  334                 buf = msgs[i].buf;
  335                 /* zero byte transfers aren't allowed */
  336                 if (len == 0 || buf == NULL) {
  337                         err = EINVAL;
  338                         goto out;
  339                 }
  340                 if (len == 1 && msgs[i].flags & IIC_M_RD)
  341                         WR4(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
  342                 else
  343                         WR4(sc, TWI_CR, TWI_CR_START);
  344                 if (msgs[i].flags & IIC_M_RD) {
  345                         sr = RD4(sc, TWI_SR);
  346                         while (!(sr & TWI_SR_TXCOMP)) {
  347                                 if ((sr = RD4(sc, TWI_SR)) & TWI_SR_RXRDY) {
  348                                         len--;
  349                                         *buf++ = RD4(sc, TWI_RHR) & 0xff;
  350                                         if (len == 1)
  351                                                 WR4(sc, TWI_CR, TWI_CR_STOP);
  352                                 }
  353                         }
  354                         if (len > 0 || (sr & TWI_SR_NACK)) {
  355                                 err = ENXIO;            // iic nack convention
  356                                 goto out;
  357                         }
  358                 } else {
  359                         while (len--) {
  360                                 if ((err = at91_twi_wait(sc, TWI_SR_TXRDY)))
  361                                         goto out;
  362                                 WR4(sc, TWI_THR, *buf++);
  363                         }
  364                 }
  365                 if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
  366                         break;
  367         }
  368 out:;
  369         if (err) {
  370                 WR4(sc, TWI_CR, TWI_CR_SWRST);
  371                 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
  372                 WR4(sc, TWI_CWGR, sc->cwgr);
  373         }
  374         AT91_TWI_UNLOCK(sc);
  375         return (err);
  376 }
  377 
  378 static device_method_t at91_twi_methods[] = {
  379         /* Device interface */
  380         DEVMETHOD(device_probe,         at91_twi_probe),
  381         DEVMETHOD(device_attach,        at91_twi_attach),
  382         DEVMETHOD(device_detach,        at91_twi_detach),
  383 
  384         /* iicbus interface */
  385         DEVMETHOD(iicbus_callback,      at91_twi_callback),
  386         DEVMETHOD(iicbus_reset,         at91_twi_rst_card),
  387         DEVMETHOD(iicbus_transfer,      at91_twi_transfer),
  388         { 0, 0 }
  389 };
  390 
  391 static driver_t at91_twi_driver = {
  392         "at91_twi",
  393         at91_twi_methods,
  394         sizeof(struct at91_twi_softc),
  395 };
  396 
  397 DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, 0, 0);
  398 DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, 0, 0);
  399 MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);

Cache object: a75dba41a6a020e4c40d5676e796b66c


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