The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/broadcom/bcm2835/bcm2835_systimer.c

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    1 /*
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
    5  * Copyright (c) 2012 Damjan Marion <dmarion@freebsd.org>
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 #include <sys/kernel.h>
   37 #include <sys/module.h>
   38 #include <sys/malloc.h>
   39 #include <sys/rman.h>
   40 #include <sys/timeet.h>
   41 #include <sys/timetc.h>
   42 #include <sys/watchdog.h>
   43 #include <machine/bus.h>
   44 #include <machine/cpu.h>
   45 #include <machine/intr.h>
   46 #include <machine/machdep.h>
   47 
   48 #include <dev/ofw/openfirm.h>
   49 #include <dev/ofw/ofw_bus.h>
   50 #include <dev/ofw/ofw_bus_subr.h>
   51 
   52 #include <machine/bus.h>
   53 
   54 #define BCM2835_NUM_TIMERS      4
   55 
   56 #define DEFAULT_TIMER           3
   57 #define DEFAULT_TIMER_NAME      "BCM2835-3"
   58 #define DEFAULT_FREQUENCY       1000000
   59 #define MIN_PERIOD              5LLU
   60 
   61 #define SYSTIMER_CS     0x00
   62 #define SYSTIMER_CLO    0x04
   63 #define SYSTIMER_CHI    0x08
   64 #define SYSTIMER_C0     0x0C
   65 #define SYSTIMER_C1     0x10
   66 #define SYSTIMER_C2     0x14
   67 #define SYSTIMER_C3     0x18
   68 
   69 struct systimer {
   70         int                     index;
   71         bool                    enabled;
   72         struct eventtimer       et;
   73 };
   74 
   75 struct bcm_systimer_softc {
   76         struct resource*        mem_res;
   77         struct resource*        irq_res[BCM2835_NUM_TIMERS];
   78         void*                   intr_hl[BCM2835_NUM_TIMERS];
   79         uint32_t                sysclk_freq;
   80         bus_space_tag_t         bst;
   81         bus_space_handle_t      bsh;
   82         struct systimer         st[BCM2835_NUM_TIMERS];
   83 };
   84 
   85 static struct resource_spec bcm_systimer_irq_spec[] = {
   86         { SYS_RES_IRQ,      0,  RF_ACTIVE },
   87         { SYS_RES_IRQ,      1,  RF_ACTIVE },
   88         { SYS_RES_IRQ,      2,  RF_ACTIVE },
   89         { SYS_RES_IRQ,      3,  RF_ACTIVE },
   90         { -1,               0,  0 }
   91 };
   92 
   93 static struct ofw_compat_data compat_data[] = {
   94         {"broadcom,bcm2835-system-timer",       1},
   95         {"brcm,bcm2835-system-timer",           1},
   96         {NULL,                                  0}
   97 };
   98 
   99 static struct bcm_systimer_softc *bcm_systimer_sc = NULL;
  100 
  101 /* Read/Write macros for Timer used as timecounter */
  102 #define bcm_systimer_tc_read_4(reg)             \
  103         bus_space_read_4(bcm_systimer_sc->bst, \
  104                 bcm_systimer_sc->bsh, reg)
  105 
  106 #define bcm_systimer_tc_write_4(reg, val)       \
  107         bus_space_write_4(bcm_systimer_sc->bst, \
  108                 bcm_systimer_sc->bsh, reg, val)
  109 
  110 static unsigned bcm_systimer_tc_get_timecount(struct timecounter *);
  111 
  112 static delay_func bcm_systimer_delay;
  113 
  114 static struct timecounter bcm_systimer_tc = {
  115         .tc_name           = DEFAULT_TIMER_NAME,
  116         .tc_get_timecount  = bcm_systimer_tc_get_timecount,
  117         .tc_poll_pps       = NULL,
  118         .tc_counter_mask   = ~0u,
  119         .tc_frequency      = 0,
  120         .tc_quality        = 1000,
  121 };
  122 
  123 static unsigned
  124 bcm_systimer_tc_get_timecount(struct timecounter *tc)
  125 {
  126         if (bcm_systimer_sc == NULL)
  127                 return (0);
  128 
  129         return bcm_systimer_tc_read_4(SYSTIMER_CLO);
  130 }
  131 
  132 static int
  133 bcm_systimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
  134 {
  135         struct systimer *st = et->et_priv;
  136         uint32_t clo, clo1;
  137         uint32_t count;
  138         register_t s;
  139 
  140         if (first != 0) {
  141                 count = ((uint32_t)et->et_frequency * first) >> 32;
  142 
  143                 s = intr_disable();
  144                 clo = bcm_systimer_tc_read_4(SYSTIMER_CLO);
  145 restart:
  146                 clo += count;
  147                 /*
  148                  * Clear pending interrupts
  149                  */
  150                 bcm_systimer_tc_write_4(SYSTIMER_CS, (1 << st->index));
  151                 bcm_systimer_tc_write_4(SYSTIMER_C0 + st->index*4, clo);
  152                 clo1 = bcm_systimer_tc_read_4(SYSTIMER_CLO);
  153                 if ((int32_t)(clo1 - clo) >= 0) {
  154                         count *= 2;
  155                         clo = clo1;
  156                         goto restart;
  157                 }
  158                 st->enabled = 1;
  159                 intr_restore(s);
  160 
  161                 return (0);
  162         }
  163 
  164         return (EINVAL);
  165 }
  166 
  167 static int
  168 bcm_systimer_stop(struct eventtimer *et)
  169 {
  170         struct systimer *st = et->et_priv;
  171         st->enabled = 0;
  172 
  173         return (0);
  174 }
  175 
  176 static int
  177 bcm_systimer_intr(void *arg)
  178 {
  179         struct systimer *st = (struct systimer *)arg;
  180         uint32_t cs;
  181 
  182         cs = bcm_systimer_tc_read_4(SYSTIMER_CS);
  183         if ((cs & (1 << st->index)) == 0)
  184                 return (FILTER_STRAY);
  185 
  186         /* ACK interrupt */
  187         bcm_systimer_tc_write_4(SYSTIMER_CS, (1 << st->index));
  188         if (st->enabled) {
  189                 if (st->et.et_active) {
  190                         st->et.et_event_cb(&st->et, st->et.et_arg);
  191                 }
  192         }
  193 
  194         return (FILTER_HANDLED);
  195 }
  196 
  197 static int
  198 bcm_systimer_probe(device_t dev)
  199 {
  200 
  201         if (!ofw_bus_status_okay(dev))
  202                 return (ENXIO);
  203 
  204         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  205                 return (ENXIO);
  206 
  207         return (BUS_PROBE_DEFAULT);
  208 }
  209 
  210 static int
  211 bcm_systimer_attach(device_t dev)
  212 {
  213         struct bcm_systimer_softc *sc = device_get_softc(dev);
  214         int err;
  215         int rid = 0;
  216 
  217         if (bcm_systimer_sc != NULL)
  218                 return (EINVAL);
  219 
  220         sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
  221         if (sc->mem_res == NULL) {
  222                 device_printf(dev, "could not allocate memory resource\n");
  223                 return (ENXIO);
  224         }
  225 
  226         sc->bst = rman_get_bustag(sc->mem_res);
  227         sc->bsh = rman_get_bushandle(sc->mem_res);
  228 
  229         /* Request the IRQ resources */
  230         err = bus_alloc_resources(dev, bcm_systimer_irq_spec,
  231                 sc->irq_res);
  232         if (err) {
  233                 device_printf(dev, "Error: could not allocate irq resources\n");
  234                 return (ENXIO);
  235         }
  236 
  237         /* TODO: get frequency from FDT */
  238         sc->sysclk_freq = DEFAULT_FREQUENCY;
  239 
  240         /* Setup and enable the timer */
  241         if (bus_setup_intr(dev, sc->irq_res[DEFAULT_TIMER], INTR_TYPE_CLK,
  242                         bcm_systimer_intr, NULL, &sc->st[DEFAULT_TIMER],
  243                         &sc->intr_hl[DEFAULT_TIMER]) != 0) {
  244                 bus_release_resources(dev, bcm_systimer_irq_spec,
  245                         sc->irq_res);
  246                 device_printf(dev, "Unable to setup the clock irq handler.\n");
  247                 return (ENXIO);
  248         }
  249 
  250         sc->st[DEFAULT_TIMER].index = DEFAULT_TIMER;
  251         sc->st[DEFAULT_TIMER].enabled = 0;
  252         sc->st[DEFAULT_TIMER].et.et_name = DEFAULT_TIMER_NAME;
  253         sc->st[DEFAULT_TIMER].et.et_flags = ET_FLAGS_ONESHOT;
  254         sc->st[DEFAULT_TIMER].et.et_quality = 1000;
  255         sc->st[DEFAULT_TIMER].et.et_frequency = sc->sysclk_freq;
  256         sc->st[DEFAULT_TIMER].et.et_min_period =
  257             (MIN_PERIOD << 32) / sc->st[DEFAULT_TIMER].et.et_frequency + 1;
  258         sc->st[DEFAULT_TIMER].et.et_max_period =
  259             (0x7ffffffeLLU << 32) / sc->st[DEFAULT_TIMER].et.et_frequency;
  260         sc->st[DEFAULT_TIMER].et.et_start = bcm_systimer_start;
  261         sc->st[DEFAULT_TIMER].et.et_stop = bcm_systimer_stop;
  262         sc->st[DEFAULT_TIMER].et.et_priv = &sc->st[DEFAULT_TIMER];
  263         et_register(&sc->st[DEFAULT_TIMER].et);
  264 
  265         bcm_systimer_sc = sc;
  266 
  267         if (device_get_unit(dev) == 0)
  268                 arm_set_delay(bcm_systimer_delay, sc);
  269 
  270         bcm_systimer_tc.tc_frequency = DEFAULT_FREQUENCY;
  271         tc_init(&bcm_systimer_tc);
  272 
  273         return (0);
  274 }
  275 
  276 static device_method_t bcm_systimer_methods[] = {
  277         DEVMETHOD(device_probe,         bcm_systimer_probe),
  278         DEVMETHOD(device_attach,        bcm_systimer_attach),
  279         { 0, 0 }
  280 };
  281 
  282 static driver_t bcm_systimer_driver = {
  283         "systimer",
  284         bcm_systimer_methods,
  285         sizeof(struct bcm_systimer_softc),
  286 };
  287 
  288 DRIVER_MODULE(bcm_systimer, simplebus, bcm_systimer_driver, 0, 0);
  289 
  290 static void
  291 bcm_systimer_delay(int usec, void *arg)
  292 {
  293         int32_t counts;
  294         uint32_t first, last;
  295 
  296         /* Get the number of times to count */
  297         counts = usec * (bcm_systimer_tc.tc_frequency / 1000000) + 1;
  298 
  299         first = bcm_systimer_tc_read_4(SYSTIMER_CLO);
  300 
  301         while (counts > 0) {
  302                 last = bcm_systimer_tc_read_4(SYSTIMER_CLO);
  303                 if (last == first)
  304                         continue;
  305                 if (last>first) {
  306                         counts -= (int32_t)(last - first);
  307                 } else {
  308                         counts -= (int32_t)((0xFFFFFFFF - first) + last);
  309                 }
  310                 first = last;
  311         }
  312 }

Cache object: 1a172c777773a040c60c03e9ef13f6b5


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