1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_platform.h"
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/reboot.h>
38 #include <sys/devmap.h>
39
40 #include <vm/vm.h>
41
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44 #include <machine/machdep.h>
45 #include <machine/platformvar.h>
46
47 #include <arm/arm/mpcore_timervar.h>
48 #include <arm/freescale/imx/imx6_anatopreg.h>
49 #include <arm/freescale/imx/imx6_anatopvar.h>
50 #include <arm/freescale/imx/imx_machdep.h>
51
52 #include <dev/fdt/fdt_common.h>
53 #include <dev/ofw/openfirm.h>
54
55 #include <arm/freescale/imx/imx6_machdep.h>
56
57 #include "platform_if.h"
58 #include "platform_pl310_if.h"
59
60 static platform_attach_t imx6_attach;
61 static platform_devmap_init_t imx6_devmap_init;
62 static platform_late_init_t imx6_late_init;
63 static platform_cpu_reset_t imx6_cpu_reset;
64
65 /*
66 * Fix FDT data related to interrupts.
67 *
68 * Driven by the needs of linux and its drivers (as always), the published FDT
69 * data for imx6 now sets the interrupt parent for most devices to the GPC
70 * interrupt controller, which is for use when the chip is in deep-sleep mode.
71 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
72 * to be handled by the GIC.
73 *
74 * Luckily, the change to the FDT data was to assign the GPC as the interrupt
75 * parent for the soc node and letting that get inherited by all other devices
76 * (except a few that directly name GIC as their interrupt parent). So we can
77 * set the world right by just changing the interrupt-parent property of the soc
78 * node to refer to GIC instead of GPC. This will get us by until we write our
79 * own GPC driver (or until linux changes its mind and the FDT data again).
80 *
81 * 2020/11/25: The tempmon and pmu nodes are siblings (not children) of the soc
82 * node, so for them to use interrupts we need to apply the same fix as we do
83 * for the soc node.
84 *
85 * We validate that we have data that looks like we expect before changing it:
86 * - SOC node exists and has GPC as its interrupt parent.
87 * - GPC node exists and has GIC as its interrupt parent.
88 * - GIC node exists and is its own interrupt parent or has no parent.
89 *
90 * This applies to all models of imx6. Luckily all of them have the devices
91 * involved at the same addresses on the same buses, so we don't need any
92 * per-soc logic. We handle this at platform attach time rather than via the
93 * fdt_fixup_table, because the latter requires matching on the FDT "model"
94 * property, and this applies to all boards including those not yet invented.
95 *
96 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10,
97 * they appear to have applied a new style rule to the dts which forbids leading
98 * zeroes in the @address qualifiers on node names. Since we have to find those
99 * nodes by string matching we now have to search for both flavors of each node
100 * name involved.
101 */
102
103 static void
104 fix_node_iparent(const char* nodepath, phandle_t gpcxref, phandle_t gicxref)
105 {
106 static const char *propname = "interrupt-parent";
107 phandle_t node, iparent;
108
109 if ((node = OF_finddevice(nodepath)) == -1)
110 return;
111 if (OF_getencprop(node, propname, &iparent, sizeof(iparent)) <= 0)
112 return;
113 if (iparent != gpcxref)
114 return;
115
116 OF_setprop(node, propname, &gicxref, sizeof(gicxref));
117 }
118
119 static void
120 fix_fdt_interrupt_data(void)
121 {
122 phandle_t gicipar, gicnode, gicxref;
123 phandle_t gpcipar, gpcnode, gpcxref;
124 int result;
125
126 /* GIC node may be child of soc node, or appear directly at root. */
127 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000");
128 if (gicnode == -1)
129 gicnode = OF_finddevice("/soc/interrupt-controller@a01000");
130 if (gicnode == -1) {
131 gicnode = OF_finddevice("/interrupt-controller@00a01000");
132 if (gicnode == -1)
133 gicnode = OF_finddevice("/interrupt-controller@a01000");
134 if (gicnode == -1)
135 return;
136 }
137 gicxref = OF_xref_from_node(gicnode);
138
139 /* If gic node has no parent, pretend it is its own parent. */
140 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar,
141 sizeof(gicipar));
142 if (result <= 0)
143 gicipar = gicxref;
144
145 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000");
146 if (gpcnode == -1)
147 gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000");
148 if (gpcnode == -1)
149 gpcnode = OF_finddevice("/soc/bus@2000000/gpc@20dc000");
150 if (gpcnode == -1)
151 return;
152 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar,
153 sizeof(gpcipar));
154 if (result <= 0)
155 return;
156 gpcxref = OF_xref_from_node(gpcnode);
157
158 if (gpcipar != gicxref || gicipar != gicxref)
159 return;
160
161 gicxref = cpu_to_fdt32(gicxref);
162 fix_node_iparent("/soc", gpcxref, gicxref);
163 fix_node_iparent("/pmu", gpcxref, gicxref);
164 fix_node_iparent("/tempmon", gpcxref, gicxref);
165 }
166
167 static void
168 fix_fdt_iomuxc_data(void)
169 {
170 phandle_t node;
171
172 /*
173 * The linux dts defines two nodes with the same mmio address range,
174 * iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and
175 * a syscon, but it only has access to a small subset of the iomuxc
176 * registers, so it can't serve as the accessor for the iomuxc driver's
177 * register IO. But right now, the simple_mfd driver attaches first,
178 * preventing the real iomuxc driver from allocating its mmio register
179 * range because it partially overlaps with the -gpr range.
180 *
181 * For now, by far the easiest thing to do to keep imx6 working is to
182 * just disable the iomuxc-gpr node because we don't have a driver for
183 * it anyway, we just need to prevent attachment of simple_mfd.
184 *
185 * If we ever write a -gpr driver, this code should probably switch to
186 * modifying the reg property so that the range covers all the iomuxc
187 * regs, then the -gpr driver can be a regular syscon driver that iomuxc
188 * uses for register access.
189 */
190 node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000");
191 if (node == -1)
192 node = OF_finddevice("/soc/bus@2000000/iomuxc-gpr@20e0000");
193 if (node != -1)
194 OF_setprop(node, "status", "disabled", sizeof("disabled"));
195 }
196
197 static int
198 imx6_attach(platform_t plat)
199 {
200
201 /* Fix soc interrupt-parent property. */
202 fix_fdt_interrupt_data();
203
204 /* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */
205 fix_fdt_iomuxc_data();
206
207 /* Inform the MPCore timer driver that its clock is variable. */
208 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
209
210 return (0);
211 }
212
213 static void
214 imx6_late_init(platform_t plat)
215 {
216 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
217
218 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
219 }
220
221 /*
222 * Set up static device mappings.
223 *
224 * This attempts to cover the most-used devices with 1MB section mappings, which
225 * is good for performance (uses fewer TLB entries for device access).
226 *
227 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
228 * L2 cache controller. Most of the 1MB range is unused reserved space.
229 *
230 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
231 *
232 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
233 * the memory map. When we get support for graphics it might make sense to
234 * static map some of that area. Be careful with other things in that area such
235 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
236 */
237 static int
238 imx6_devmap_init(platform_t plat)
239 {
240 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
241 const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
242 const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
243 const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
244 const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
245 const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
246
247 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
248 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
249 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
250
251 return (0);
252 }
253
254 static void
255 imx6_cpu_reset(platform_t plat)
256 {
257 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
258
259 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
260 }
261
262 /*
263 * Determine what flavor of imx6 we're running on.
264 *
265 * This code is based on the way u-boot does it. Information found on the web
266 * indicates that Freescale themselves were the original source of this logic,
267 * including the strange check for number of CPUs in the SCU configuration
268 * register, which is apparently needed on some revisions of the SOLO.
269 *
270 * According to the documentation, there is such a thing as an i.MX6 Dual
271 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
272 * number or provided any logic to handle it in their detection code.
273 *
274 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
275 * documented in the chip reference manual. (SCU configuration is mentioned,
276 * but not mapped out in detail.) I think the bottom two bits of the scu config
277 * register may be ncpu-1.
278 *
279 * This hasn't been tested yet on a dual[-lite].
280 *
281 * On a solo:
282 * digprog = 0x00610001
283 * hwsoc = 0x00000062
284 * scu config = 0x00000500
285 * On a quad:
286 * digprog = 0x00630002
287 * hwsoc = 0x00000063
288 * scu config = 0x00005503
289 */
290 u_int
291 imx_soc_type(void)
292 {
293 uint32_t digprog, hwsoc;
294 uint32_t *pcr;
295 static u_int soctype;
296 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
297 #define HWSOC_MX6SL 0x60
298 #define HWSOC_MX6DL 0x61
299 #define HWSOC_MX6SOLO 0x62
300 #define HWSOC_MX6Q 0x63
301 #define HWSOC_MX6UL 0x64
302
303 if (soctype != 0)
304 return (soctype);
305
306 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
307 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
308 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
309
310 if (hwsoc != HWSOC_MX6SL) {
311 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
312 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
313 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
314 /*printf("digprog = 0x%08x\n", digprog);*/
315 if (hwsoc == HWSOC_MX6DL) {
316 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
317 if (pcr != NULL) {
318 /*printf("scu config = 0x%08x\n", *pcr);*/
319 if ((*pcr & 0x03) == 0) {
320 hwsoc = HWSOC_MX6SOLO;
321 }
322 }
323 }
324 }
325 /* printf("hwsoc 0x%08x\n", hwsoc); */
326
327 switch (hwsoc) {
328 case HWSOC_MX6SL:
329 soctype = IMXSOC_6SL;
330 break;
331 case HWSOC_MX6SOLO:
332 soctype = IMXSOC_6S;
333 break;
334 case HWSOC_MX6DL:
335 soctype = IMXSOC_6DL;
336 break;
337 case HWSOC_MX6Q :
338 soctype = IMXSOC_6Q;
339 break;
340 case HWSOC_MX6UL:
341 soctype = IMXSOC_6UL;
342 break;
343 default:
344 printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
345 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
346 soctype = IMXSOC_6Q;
347 break;
348 }
349
350 return (soctype);
351 }
352
353 /*
354 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
355 * option SOCDEV_PA=0x02000000
356 * option SOCDEV_VA=0x02000000
357 * option EARLY_PRINTF
358 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
359 * makes sense now, but if multiple SOCs do that it will make early_putc another
360 * duplicate symbol to be eliminated on the path to a generic kernel.
361 */
362 #if 0
363 static void
364 imx6_early_putc(int c)
365 {
366 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
367 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
368 const uint32_t UART_TXRDY = (1 << 3);
369
370 while ((*UART_STAT_REG & UART_TXRDY) == 0)
371 continue;
372 *UART_TX_REG = c;
373 }
374 early_putc_t *early_putc = imx6_early_putc;
375 #endif
376
377 static platform_method_t imx6_methods[] = {
378 PLATFORMMETHOD(platform_attach, imx6_attach),
379 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
380 PLATFORMMETHOD(platform_late_init, imx6_late_init),
381 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset),
382
383 #ifdef SMP
384 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap),
385 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid),
386 #endif
387
388 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init),
389
390 PLATFORMMETHOD_END,
391 };
392
393 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
394 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
395 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
396 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);
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