The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/imx/imx6_src.c

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    1 /*-
    2  * Copyright (c) 2015 Oleksandr Tymoshenko <gonzo@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 /*
   31  * System Reset Control for iMX6
   32  */
   33 
   34 #include <sys/param.h>
   35 #include <sys/systm.h>
   36 #include <sys/kernel.h>
   37 #include <sys/module.h>
   38 #include <sys/bus.h>
   39 #include <sys/rman.h>
   40 
   41 #include <dev/ofw/ofw_bus.h>
   42 #include <dev/ofw/ofw_bus_subr.h>
   43 
   44 #include <machine/bus.h>
   45 
   46 #include <arm/freescale/imx/imx6_src.h>
   47 
   48 #define SRC_SCR         0
   49 #define         SW_IPU1_RST     (1 << 3)
   50 
   51 struct src_softc {
   52         device_t        dev;
   53         struct resource *mem_res;
   54 };
   55 
   56 static struct src_softc *src_sc;
   57 
   58 static inline uint32_t
   59 RD4(struct src_softc *sc, bus_size_t off)
   60 {
   61 
   62         return (bus_read_4(sc->mem_res, off));
   63 }
   64 
   65 static inline void
   66 WR4(struct src_softc *sc, bus_size_t off, uint32_t val)
   67 {
   68 
   69         bus_write_4(sc->mem_res, off, val);
   70 }
   71 
   72 int
   73 src_reset_ipu(void)
   74 {
   75         uint32_t reg;
   76         int timeout = 10000;
   77 
   78         if (src_sc == NULL)
   79                 return (-1);
   80 
   81         reg = RD4(src_sc, SRC_SCR);
   82         reg |= SW_IPU1_RST;
   83         WR4(src_sc, SRC_SCR, reg);
   84 
   85         while (timeout-- > 0) {
   86                 reg = RD4(src_sc, SRC_SCR);
   87                 if (reg & SW_IPU1_RST)
   88                         DELAY(1);
   89                 else
   90                         break;
   91         }
   92 
   93         if (timeout < 0)
   94                 return (-1);
   95         else
   96                 return (0);
   97 }
   98 
   99 static int
  100 src_detach(device_t dev)
  101 {
  102         struct src_softc *sc;
  103 
  104         sc = device_get_softc(dev);
  105 
  106         if (sc->mem_res != NULL)
  107                 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
  108 
  109         return (0);
  110 }
  111 
  112 static int
  113 src_attach(device_t dev)
  114 {
  115         struct src_softc *sc;
  116         int err, rid;
  117 
  118         sc = device_get_softc(dev);
  119         err = 0;
  120 
  121         /* Allocate bus_space resources. */
  122         rid = 0;
  123         sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  124             RF_ACTIVE);
  125         if (sc->mem_res == NULL) {
  126                 device_printf(dev, "Cannot allocate memory resources\n");
  127                 err = ENXIO;
  128                 goto out;
  129         }
  130 
  131         src_sc = sc;
  132 
  133         err = 0;
  134 
  135 out:
  136 
  137         if (err != 0)
  138                 src_detach(dev);
  139 
  140         return (err);
  141 }
  142 
  143 static int
  144 src_probe(device_t dev)
  145 {
  146 
  147         if ((ofw_bus_is_compatible(dev, "fsl,imx6q-src") == 0) &&
  148             (ofw_bus_is_compatible(dev, "fsl,imx6-src") == 0))
  149                 return (ENXIO);
  150 
  151         device_set_desc(dev, "Freescale i.MX6 System Reset Controller");
  152 
  153         return (BUS_PROBE_DEFAULT);
  154 }
  155 
  156 static device_method_t src_methods[] = {
  157         /* Device interface */
  158         DEVMETHOD(device_probe,  src_probe),
  159         DEVMETHOD(device_attach, src_attach),
  160         DEVMETHOD(device_detach, src_detach),
  161 
  162         DEVMETHOD_END
  163 };
  164 
  165 static driver_t src_driver = {
  166         "src",
  167         src_methods,
  168         sizeof(struct src_softc)
  169 };
  170 
  171 DRIVER_MODULE(src, simplebus, src_driver, 0, 0);

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