The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/imx/imx_iomux.c

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    1 /*-
    2  * Copyright (c) 2014 Ian Lepore
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD: releng/11.0/sys/arm/freescale/imx/imx_iomux.c 299702 2016-05-13 22:05:16Z gonzo $
   27  */
   28 
   29 /*
   30  * Pin mux and pad control driver for imx5 and imx6.
   31  *
   32  * This driver implements the fdt_pinctrl interface for configuring the gpio and
   33  * peripheral pins based on fdt configuration data.
   34  *
   35  * When the driver attaches, it walks the entire fdt tree and automatically
   36  * configures the pins for each device which has a pinctrl-0 property and whose
   37  * status is "okay".  In addition it implements the fdt_pinctrl_configure()
   38  * method which any other driver can call at any time to reconfigure its pins.
   39  *
   40  * The nature of the fsl,pins property in fdt data makes this driver's job very
   41  * easy.  Instead of representing each pin and pad configuration using symbolic
   42  * properties such as pullup-enable="true" and so on, the data simply contains
   43  * the addresses of the registers that control the pins, and the raw values to
   44  * store in those registers.
   45  *
   46  * The imx5 and imx6 SoCs also have a small number of "general purpose
   47  * registers" in the iomuxc device which are used to control an assortment
   48  * of completely unrelated aspects of SoC behavior.  This driver provides other
   49  * drivers with direct access to those registers via simple accessor functions.
   50  */
   51 
   52 #include <sys/param.h>
   53 #include <sys/systm.h>
   54 #include <sys/bus.h>
   55 #include <sys/kernel.h>
   56 #include <sys/module.h>
   57 #include <sys/malloc.h>
   58 #include <sys/rman.h>
   59 
   60 #include <machine/bus.h>
   61 
   62 #include <dev/fdt/fdt_common.h>
   63 #include <dev/fdt/fdt_pinctrl.h>
   64 #include <dev/ofw/openfirm.h>
   65 #include <dev/ofw/ofw_bus.h>
   66 #include <dev/ofw/ofw_bus_subr.h>
   67 
   68 #include <arm/freescale/imx/imx_iomuxvar.h>
   69 #include <arm/freescale/imx/imx_machdep.h>
   70 
   71 struct iomux_softc {
   72         device_t        dev;
   73         struct resource *mem_res;
   74         u_int           last_gpreg;
   75 };
   76 
   77 static struct iomux_softc *iomux_sc;
   78 
   79 static struct ofw_compat_data compat_data[] = {
   80         {"fsl,imx6dl-iomuxc",   true},
   81         {"fsl,imx6q-iomuxc",    true},
   82         {"fsl,imx6sl-iomuxc",   true},
   83         {"fsl,imx6sx-iomuxc",   true},
   84         {"fsl,imx53-iomuxc",    true},
   85         {"fsl,imx51-iomuxc",    true},
   86         {NULL,                  false},
   87 };
   88 
   89 /*
   90  * Each tuple in an fsl,pins property contains these fields.
   91  */
   92 struct pincfg {
   93         uint32_t mux_reg;
   94         uint32_t padconf_reg;
   95         uint32_t input_reg;
   96         uint32_t mux_val;
   97         uint32_t input_val;
   98         uint32_t padconf_val;
   99 };
  100 
  101 #define PADCONF_NONE    (1U << 31)      /* Do not configure pad. */
  102 #define PADCONF_SION    (1U << 30)      /* Force SION bit in mux register. */
  103 #define PADMUX_SION     (1U <<  4)      /* The SION bit in the mux register. */
  104 
  105 static inline uint32_t
  106 RD4(struct iomux_softc *sc, bus_size_t off)
  107 {
  108 
  109         return (bus_read_4(sc->mem_res, off));
  110 }
  111 
  112 static inline void
  113 WR4(struct iomux_softc *sc, bus_size_t off, uint32_t val)
  114 {
  115 
  116         bus_write_4(sc->mem_res, off, val);
  117 }
  118 
  119 static void
  120 iomux_configure_input(struct iomux_softc *sc, uint32_t reg, uint32_t val)
  121 {
  122         u_int select, mask, shift, width;
  123 
  124         /* If register and value are zero, there is nothing to configure. */
  125         if (reg == 0 && val == 0)
  126                 return;
  127 
  128         /*
  129          * If the config value has 0xff in the high byte it is encoded:
  130          *      31     23      15      7        0
  131          *      | 0xff | shift | width | select |
  132          * We need to mask out the old select value and OR in the new, using a
  133          * mask of the given width and shifting the values up by shift.
  134          */
  135         if ((val & 0xff000000) == 0xff000000) {
  136                 select = val & 0x000000ff;
  137                 width = (val & 0x0000ff00) >> 8;
  138                 shift = (val & 0x00ff0000) >> 16;
  139                 mask  = ((1u << width) - 1) << shift;
  140                 val = (RD4(sc, reg) & ~mask) | (select << shift);
  141         }
  142         WR4(sc, reg, val);
  143 }
  144 
  145 static int
  146 iomux_configure_pins(device_t dev, phandle_t cfgxref)
  147 {
  148         struct iomux_softc *sc;
  149         struct pincfg *cfgtuples, *cfg;
  150         phandle_t cfgnode;
  151         int i, ntuples;
  152         uint32_t sion;
  153 
  154         sc = device_get_softc(dev);
  155         cfgnode = OF_node_from_xref(cfgxref);
  156         ntuples = OF_getencprop_alloc(cfgnode, "fsl,pins", sizeof(*cfgtuples),
  157             (void **)&cfgtuples);
  158         if (ntuples < 0)
  159                 return (ENOENT);
  160         if (ntuples == 0)
  161                 return (0); /* Empty property is not an error. */
  162         for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) {
  163                 sion = (cfg->padconf_val & PADCONF_SION) ? PADMUX_SION : 0;
  164                 WR4(sc, cfg->mux_reg, cfg->mux_val | sion);
  165                 iomux_configure_input(sc, cfg->input_reg, cfg->input_val);
  166                 if ((cfg->padconf_val & PADCONF_NONE) == 0)
  167                         WR4(sc, cfg->padconf_reg, cfg->padconf_val);
  168                 if (bootverbose) {
  169                         char name[32]; 
  170                         OF_getprop(cfgnode, "name", &name, sizeof(name));
  171                         printf("%16s: muxreg 0x%04x muxval 0x%02x "
  172                             "inpreg 0x%04x inpval 0x%02x "
  173                             "padreg 0x%04x padval 0x%08x\n",
  174                             name, cfg->mux_reg, cfg->mux_val | sion,
  175                             cfg->input_reg, cfg->input_val,
  176                             cfg->padconf_reg, cfg->padconf_val);
  177                 }
  178         }
  179         OF_prop_free(cfgtuples);
  180         return (0);
  181 }
  182 
  183 static int
  184 iomux_probe(device_t dev)
  185 {
  186 
  187         if (!ofw_bus_status_okay(dev))
  188                 return (ENXIO);
  189 
  190         if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
  191                 return (ENXIO);
  192 
  193         device_set_desc(dev, "Freescale i.MX pin configuration");
  194         return (BUS_PROBE_DEFAULT);
  195 }
  196 
  197 static int
  198 iomux_detach(device_t dev)
  199 {
  200 
  201         /* This device is always present. */
  202         return (EBUSY);
  203 }
  204 
  205 static int
  206 iomux_attach(device_t dev)
  207 {
  208         struct iomux_softc * sc;
  209         int rid;
  210 
  211         sc = device_get_softc(dev);
  212         sc->dev = dev;
  213 
  214         switch (imx_soc_type()) {
  215         case IMXSOC_51:
  216                 sc->last_gpreg = 1;
  217                 break;
  218         case IMXSOC_53:
  219                 sc->last_gpreg = 2;
  220                 break;
  221         case IMXSOC_6DL:
  222         case IMXSOC_6S:
  223         case IMXSOC_6SL:
  224         case IMXSOC_6Q:
  225                 sc->last_gpreg = 13;
  226                 break;
  227         default:
  228                 device_printf(dev, "Unknown SoC type\n");
  229                 return (ENXIO);
  230         }
  231 
  232         rid = 0;
  233         sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  234             RF_ACTIVE);
  235         if (sc->mem_res == NULL) {
  236                 device_printf(dev, "Cannot allocate memory resources\n");
  237                 return (ENXIO);
  238         }
  239 
  240         iomux_sc = sc;
  241 
  242         /*
  243          * Register as a pinctrl device, and call the convenience function that
  244          * walks the entire device tree invoking FDT_PINCTRL_CONFIGURE() on any
  245          * pinctrl-0 property cells whose xref phandle refers to a configuration
  246          * that is a child node of our node in the tree.
  247          *
  248          * The pinctrl bindings documentation specifically mentions that the
  249          * pinctrl device itself may have a pinctrl-0 property which contains
  250          * static configuration to be applied at device init time.  The tree
  251          * walk will automatically handle this for us when it passes through our
  252          * node in the tree.
  253          */
  254         fdt_pinctrl_register(dev, "fsl,pins");
  255         fdt_pinctrl_configure_tree(dev);
  256 
  257         return (0);
  258 }
  259 
  260 uint32_t
  261 imx_iomux_gpr_get(u_int regnum)
  262 {
  263         struct iomux_softc * sc;
  264 
  265         sc = iomux_sc;
  266         KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__));
  267         KASSERT(regnum >= 0 && regnum <= sc->last_gpreg, 
  268             ("%s bad regnum %u, max %u", __FUNCTION__, regnum, sc->last_gpreg));
  269 
  270         return (RD4(iomux_sc, regnum * 4));
  271 }
  272 
  273 void
  274 imx_iomux_gpr_set(u_int regnum, uint32_t val)
  275 {
  276         struct iomux_softc * sc;
  277 
  278         sc = iomux_sc;
  279         KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__));
  280         KASSERT(regnum >= 0 && regnum <= sc->last_gpreg, 
  281             ("%s bad regnum %u, max %u", __FUNCTION__, regnum, sc->last_gpreg));
  282 
  283         WR4(iomux_sc, regnum * 4, val);
  284 }
  285 
  286 void
  287 imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t setbits)
  288 {
  289         struct iomux_softc * sc;
  290         uint32_t val;
  291 
  292         sc = iomux_sc;
  293         KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__));
  294         KASSERT(regnum >= 0 && regnum <= sc->last_gpreg, 
  295             ("%s bad regnum %u, max %u", __FUNCTION__, regnum, sc->last_gpreg));
  296 
  297         val = RD4(iomux_sc, regnum * 4);
  298         val = (val & ~clrbits) | setbits;
  299         WR4(iomux_sc, regnum * 4, val);
  300 }
  301 
  302 static device_method_t imx_iomux_methods[] = {
  303         /* Device interface */
  304         DEVMETHOD(device_probe,         iomux_probe),
  305         DEVMETHOD(device_attach,        iomux_attach),
  306         DEVMETHOD(device_detach,        iomux_detach),
  307 
  308         /* fdt_pinctrl interface */
  309         DEVMETHOD(fdt_pinctrl_configure,iomux_configure_pins),
  310 
  311         DEVMETHOD_END
  312 };
  313 
  314 static driver_t imx_iomux_driver = {
  315         "imx_iomux",
  316         imx_iomux_methods,
  317         sizeof(struct iomux_softc),
  318 };
  319 
  320 static devclass_t imx_iomux_devclass;
  321 
  322 EARLY_DRIVER_MODULE(imx_iomux, simplebus, imx_iomux_driver, 
  323     imx_iomux_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_LATE);
  324 

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