imx_wdog.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012, 2013 The FreeBSD Foundation
    5  *
    6  * This software was developed by Oleksandr Rybalko under sponsorship
    7  * from the FreeBSD Foundation.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1.   Redistributions of source code must retain the above copyright
   13  *      notice, this list of conditions and the following disclaimer.
   14  * 2.   Redistributions in binary form must reproduce the above copyright
   15  *      notice, this list of conditions and the following disclaimer in the
   16  *      documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD$");
   33 
   34 #include <sys/param.h>
   35 #include <sys/bus.h>
   36 #include <sys/eventhandler.h>
   37 #include <sys/kernel.h>
   38 #include <sys/lock.h>
   39 #include <sys/module.h>
   40 #include <sys/mutex.h>
   41 #include <sys/resource.h>
   42 #include <sys/rman.h>
   43 #include <sys/systm.h>
   44 #include <sys/time.h>
   45 #include <sys/watchdog.h>
   46 
   47 #include <machine/bus.h>
   48 #include <machine/intr.h>
   49 
   50 #include <dev/ofw/openfirm.h>
   51 #include <dev/ofw/ofw_bus.h>
   52 #include <dev/ofw/ofw_bus_subr.h>
   53 
   54 #include <arm/freescale/imx/imx_machdep.h>
   55 #include <arm/freescale/imx/imx_wdogreg.h>
   56 
   57 struct imx_wdog_softc {
   58         struct mtx              sc_mtx;
   59         device_t                sc_dev;
   60         struct resource         *sc_res[2];
   61         void                    *sc_ih;
   62         uint32_t                sc_timeout;
   63         bool                    sc_pde_enabled;
   64 };
   65 
   66 static struct resource_spec imx_wdog_spec[] = {
   67         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   68         { SYS_RES_IRQ,          0,      RF_ACTIVE },
   69         RESOURCE_SPEC_END
   70 };
   71 
   72 #define MEMRES  0
   73 #define IRQRES  1
   74 
   75 static struct ofw_compat_data compat_data[] = {
   76         {"fsl,imx6sx-wdt", 1},
   77         {"fsl,imx6sl-wdt", 1},
   78         {"fsl,imx6q-wdt",  1},
   79         {"fsl,imx53-wdt",  1},
   80         {"fsl,imx51-wdt",  1},
   81         {"fsl,imx50-wdt",  1},
   82         {"fsl,imx35-wdt",  1},
   83         {"fsl,imx27-wdt",  1},
   84         {"fsl,imx25-wdt",  1},
   85         {"fsl,imx21-wdt",  1},
   86         {NULL,             0}
   87 };
   88 
   89 static inline uint16_t
   90 RD2(struct imx_wdog_softc *sc, bus_size_t offs)
   91 {
   92 
   93         return (bus_read_2(sc->sc_res[MEMRES], offs));
   94 }
   95 
   96 static inline void
   97 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val)
   98 {
   99 
  100         bus_write_2(sc->sc_res[MEMRES], offs, val);
  101 }
  102 
  103 static int
  104 imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout)
  105 {
  106         uint16_t reg;
  107 
  108         if (timeout < 1 || timeout > 128)
  109                 return (EINVAL);
  110 
  111         mtx_lock(&sc->sc_mtx);
  112         if (timeout != sc->sc_timeout) {
  113                 sc->sc_timeout = timeout;
  114                 reg = RD2(sc, WDOG_CR_REG);
  115                 reg &= ~WDOG_CR_WT_MASK;
  116                 reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT);
  117                 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE);
  118         }
  119         /* Refresh counter */
  120         WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1);
  121         WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2);
  122         /* Watchdog active, can disable rom-boot watchdog. */
  123         if (sc->sc_pde_enabled) {
  124                 sc->sc_pde_enabled = false;
  125                 reg = RD2(sc, WDOG_MCR_REG);
  126                 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE);
  127         }
  128         mtx_unlock(&sc->sc_mtx);
  129 
  130         return (0);
  131 }
  132 
  133 static void
  134 imx_watchdog(void *arg, u_int cmd, int *error)
  135 {
  136         struct imx_wdog_softc *sc;
  137         u_int timeout;
  138 
  139         sc = arg;
  140         if (cmd == 0) {
  141                 if (bootverbose)
  142                         device_printf(sc->sc_dev, "Can not be disabled.\n");
  143                 *error = EOPNOTSUPP;
  144         } else {
  145                 timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U);
  146                 if (imx_wdog_enable(sc, timeout) == 0)
  147                         *error = 0;
  148         }
  149 }
  150 
  151 static int
  152 imx_wdog_intr(void *arg)
  153 {
  154         struct imx_wdog_softc *sc = arg;
  155 
  156         /*
  157          * When configured for external reset, the actual reset is supposed to
  158          * happen when some external device responds to the assertion of the
  159          * WDOG_B signal by asserting the POR signal to the chip.  This
  160          * interrupt handler is a backstop mechanism; it is set up to fire
  161          * simultaneously with WDOG_B, and if the external reset happens we'll
  162          * never actually make it to here.  If we do make it here, just trigger
  163          * a software reset.  That code will see that external reset is
  164          * configured, and it will wait for 1 second for it to take effect, then
  165          * it will do a software reset as a fallback.
  166          */
  167         imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG));
  168 
  169         return (FILTER_HANDLED); /* unreached */
  170 }
  171 
  172 static int
  173 imx_wdog_probe(device_t dev)
  174 {
  175 
  176         if (!ofw_bus_status_okay(dev))
  177                 return (ENXIO);
  178 
  179         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  180                 return (ENXIO);
  181 
  182         device_set_desc(dev, "Freescale i.MX Watchdog");
  183         return (0);
  184 }
  185 
  186 static int
  187 imx_wdog_attach(device_t dev)
  188 {
  189         struct imx_wdog_softc *sc;
  190         pcell_t timeout;
  191 
  192         sc = device_get_softc(dev);
  193         sc->sc_dev = dev;
  194 
  195         if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) {
  196                 device_printf(dev, "could not allocate resources\n");
  197                 return (ENXIO);
  198         }
  199 
  200         mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF);
  201 
  202         /*
  203          * If we're configured to assert an external reset signal, set up the
  204          * hardware to do so, and install an interrupt handler whose only
  205          * purpose is to backstop the external reset.  Don't worry if the
  206          * interrupt setup fails, since it's only a backstop measure.
  207          */
  208         if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) {
  209                 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG));
  210                 bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES],
  211                     INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc,
  212                     &sc->sc_ih);
  213                 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */
  214         }
  215 
  216         /*
  217          * Note whether the rom-boot so-called "power-down" watchdog is active,
  218          * so we can disable it when the regular watchdog is first enabled.
  219          */
  220         if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE)
  221                 sc->sc_pde_enabled = true;
  222 
  223         EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0);
  224 
  225         /* If there is a timeout-sec property, activate the watchdog. */
  226         if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec",
  227             &timeout, sizeof(timeout)) == sizeof(timeout)) {
  228                 if (timeout < 1 || timeout > 128) {
  229                         device_printf(sc->sc_dev, "ERROR: bad timeout-sec "
  230                             "property value %u, using 128\n", timeout);
  231                         timeout = 128;
  232                 }
  233                 imx_wdog_enable(sc, timeout);
  234                 device_printf(sc->sc_dev, "watchdog enabled using "
  235                     "timeout-sec property value %u\n", timeout);
  236         }
  237 
  238         /*
  239          * The watchdog hardware cannot be disabled, so there's little point in
  240          * coding up a detach() routine to carefully tear everything down, just
  241          * make the device busy so that detach can't happen.
  242          */
  243         device_busy(sc->sc_dev);
  244         return (0);
  245 }
  246 
  247 static device_method_t imx_wdog_methods[] = {
  248         DEVMETHOD(device_probe,         imx_wdog_probe),
  249         DEVMETHOD(device_attach,        imx_wdog_attach),
  250         DEVMETHOD_END
  251 };
  252 
  253 static driver_t imx_wdog_driver = {
  254         "imx_wdog",
  255         imx_wdog_methods,
  256         sizeof(struct imx_wdog_softc),
  257 };
  258 
  259 EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver, 0, 0, BUS_PASS_TIMER);
  260 SIMPLEBUS_PNP_INFO(compat_data);

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FreeBSD/Linux Kernel Cross Reference sys/arm/freescale/imx/imx_wdog.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/imx/imx_wdog.c