imx_wdog.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012, 2013 The FreeBSD Foundation
    5  * All rights reserved.
    6  *
    7  * This software was developed by Oleksandr Rybalko under sponsorship
    8  * from the FreeBSD Foundation.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1.   Redistributions of source code must retain the above copyright
   14  *      notice, this list of conditions and the following disclaimer.
   15  * 2.   Redistributions in binary form must reproduce the above copyright
   16  *      notice, this list of conditions and the following disclaimer in the
   17  *      documentation and/or other materials provided with the distribution.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   29  * SUCH DAMAGE.
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD$");
   34 
   35 #include <sys/param.h>
   36 #include <sys/bus.h>
   37 #include <sys/eventhandler.h>
   38 #include <sys/kernel.h>
   39 #include <sys/lock.h>
   40 #include <sys/module.h>
   41 #include <sys/mutex.h>
   42 #include <sys/resource.h>
   43 #include <sys/rman.h>
   44 #include <sys/systm.h>
   45 #include <sys/time.h>
   46 #include <sys/watchdog.h>
   47 
   48 #include <machine/bus.h>
   49 #include <machine/intr.h>
   50 
   51 #include <dev/ofw/openfirm.h>
   52 #include <dev/ofw/ofw_bus.h>
   53 #include <dev/ofw/ofw_bus_subr.h>
   54 
   55 #include <arm/freescale/imx/imx_machdep.h>
   56 #include <arm/freescale/imx/imx_wdogreg.h>
   57 
   58 struct imx_wdog_softc {
   59         struct mtx              sc_mtx;
   60         device_t                sc_dev;
   61         struct resource         *sc_res[2];
   62         void                    *sc_ih;
   63         uint32_t                sc_timeout;
   64         bool                    sc_pde_enabled;
   65 };
   66 
   67 static struct resource_spec imx_wdog_spec[] = {
   68         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   69         { SYS_RES_IRQ,          0,      RF_ACTIVE },
   70         RESOURCE_SPEC_END
   71 };
   72 
   73 #define MEMRES  0
   74 #define IRQRES  1
   75 
   76 static struct ofw_compat_data compat_data[] = {
   77         {"fsl,imx6sx-wdt", 1},
   78         {"fsl,imx6sl-wdt", 1},
   79         {"fsl,imx6q-wdt",  1},
   80         {"fsl,imx53-wdt",  1},
   81         {"fsl,imx51-wdt",  1},
   82         {"fsl,imx50-wdt",  1},
   83         {"fsl,imx35-wdt",  1},
   84         {"fsl,imx27-wdt",  1},
   85         {"fsl,imx25-wdt",  1},
   86         {"fsl,imx21-wdt",  1},
   87         {NULL,             0}
   88 };
   89 
   90 static inline uint16_t
   91 RD2(struct imx_wdog_softc *sc, bus_size_t offs)
   92 {
   93 
   94         return (bus_read_2(sc->sc_res[MEMRES], offs));
   95 }
   96 
   97 static inline void
   98 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val)
   99 {
  100 
  101         bus_write_2(sc->sc_res[MEMRES], offs, val);
  102 }
  103 
  104 static int
  105 imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout)
  106 {
  107         uint16_t reg;
  108 
  109         if (timeout < 1 || timeout > 128)
  110                 return (EINVAL);
  111 
  112         mtx_lock(&sc->sc_mtx);
  113         if (timeout != sc->sc_timeout) {
  114                 sc->sc_timeout = timeout;
  115                 reg = RD2(sc, WDOG_CR_REG);
  116                 reg &= ~WDOG_CR_WT_MASK;
  117                 reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT);
  118                 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE);
  119         }
  120         /* Refresh counter */
  121         WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1);
  122         WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2);
  123         /* Watchdog active, can disable rom-boot watchdog. */
  124         if (sc->sc_pde_enabled) {
  125                 sc->sc_pde_enabled = false;
  126                 reg = RD2(sc, WDOG_MCR_REG);
  127                 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE);
  128         }
  129         mtx_unlock(&sc->sc_mtx);
  130 
  131         return (0);
  132 }
  133 
  134 static void
  135 imx_watchdog(void *arg, u_int cmd, int *error)
  136 {
  137         struct imx_wdog_softc *sc;
  138         u_int timeout;
  139 
  140         sc = arg;
  141         if (cmd == 0) {
  142                 if (bootverbose)
  143                         device_printf(sc->sc_dev, "Can not be disabled.\n");
  144                 *error = EOPNOTSUPP;
  145         } else {
  146                 timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U);
  147                 if (imx_wdog_enable(sc, timeout) == 0)
  148                         *error = 0;
  149         }
  150 }
  151 
  152 static int
  153 imx_wdog_intr(void *arg)
  154 {
  155         struct imx_wdog_softc *sc = arg;
  156 
  157         /*
  158          * When configured for external reset, the actual reset is supposed to
  159          * happen when some external device responds to the assertion of the
  160          * WDOG_B signal by asserting the POR signal to the chip.  This
  161          * interrupt handler is a backstop mechanism; it is set up to fire
  162          * simultaneously with WDOG_B, and if the external reset happens we'll
  163          * never actually make it to here.  If we do make it here, just trigger
  164          * a software reset.  That code will see that external reset is
  165          * configured, and it will wait for 1 second for it to take effect, then
  166          * it will do a software reset as a fallback.
  167          */
  168         imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG));
  169 
  170         return (FILTER_HANDLED); /* unreached */
  171 }
  172 
  173 static int
  174 imx_wdog_probe(device_t dev)
  175 {
  176 
  177         if (!ofw_bus_status_okay(dev))
  178                 return (ENXIO);
  179 
  180         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  181                 return (ENXIO);
  182 
  183         device_set_desc(dev, "Freescale i.MX Watchdog");
  184         return (0);
  185 }
  186 
  187 static int
  188 imx_wdog_attach(device_t dev)
  189 {
  190         struct imx_wdog_softc *sc;
  191         pcell_t timeout;
  192 
  193         sc = device_get_softc(dev);
  194         sc->sc_dev = dev;
  195 
  196         if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) {
  197                 device_printf(dev, "could not allocate resources\n");
  198                 return (ENXIO);
  199         }
  200 
  201         mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF);
  202 
  203         /*
  204          * If we're configured to assert an external reset signal, set up the
  205          * hardware to do so, and install an interrupt handler whose only
  206          * purpose is to backstop the external reset.  Don't worry if the
  207          * interrupt setup fails, since it's only a backstop measure.
  208          */
  209         if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) {
  210                 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG));
  211                 bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES],
  212                     INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc,
  213                     &sc->sc_ih);
  214                 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */
  215         }
  216 
  217         /*
  218          * Note whether the rom-boot so-called "power-down" watchdog is active,
  219          * so we can disable it when the regular watchdog is first enabled.
  220          */
  221         if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE)
  222                 sc->sc_pde_enabled = true;
  223 
  224         EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0);
  225 
  226         /* If there is a timeout-sec property, activate the watchdog. */
  227         if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec",
  228             &timeout, sizeof(timeout)) == sizeof(timeout)) {
  229                 if (timeout < 1 || timeout > 128) {
  230                         device_printf(sc->sc_dev, "ERROR: bad timeout-sec "
  231                             "property value %u, using 128\n", timeout);
  232                         timeout = 128;
  233                 }
  234                 imx_wdog_enable(sc, timeout);
  235                 device_printf(sc->sc_dev, "watchdog enabled using "
  236                     "timeout-sec property value %u\n", timeout);
  237         }
  238 
  239         /*
  240          * The watchdog hardware cannot be disabled, so there's little point in
  241          * coding up a detach() routine to carefully tear everything down, just
  242          * make the device busy so that detach can't happen.
  243          */
  244         device_busy(sc->sc_dev);
  245         return (0);
  246 }
  247 
  248 static device_method_t imx_wdog_methods[] = {
  249         DEVMETHOD(device_probe,         imx_wdog_probe),
  250         DEVMETHOD(device_attach,        imx_wdog_attach),
  251         DEVMETHOD_END
  252 };
  253 
  254 static driver_t imx_wdog_driver = {
  255         "imx_wdog",
  256         imx_wdog_methods,
  257         sizeof(struct imx_wdog_softc),
  258 };
  259 
  260 static devclass_t imx_wdog_devclass;
  261 
  262 EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver,
  263     imx_wdog_devclass, 0, 0, BUS_PASS_TIMER);
  264 SIMPLEBUS_PNP_INFO(compat_data);

Cache object: 118707612f564422e723ff11a712e74c

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FreeBSD/Linux Kernel Cross Reference sys/arm/freescale/imx/imx_wdog.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/imx/imx_wdog.c