The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/vybrid/vf_ehci.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Vybrid Family Universal Serial Bus (USB) Controller
   31  * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __FBSDID("$FreeBSD: head/sys/arm/freescale/vybrid/vf_ehci.c 335988 2018-07-05 15:52:26Z ian $");
   36 
   37 #include "opt_bus.h"
   38 
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/kernel.h>
   42 #include <sys/module.h>
   43 #include <sys/bus.h>
   44 #include <sys/condvar.h>
   45 #include <sys/rman.h>
   46 #include <sys/gpio.h>
   47 
   48 #include <dev/ofw/ofw_bus.h>
   49 #include <dev/ofw/ofw_bus_subr.h>
   50 
   51 #include <dev/usb/usb.h>
   52 #include <dev/usb/usbdi.h>
   53 #include <dev/usb/usb_busdma.h>
   54 #include <dev/usb/usb_process.h>
   55 #include <dev/usb/usb_controller.h>
   56 #include <dev/usb/usb_bus.h>
   57 #include <dev/usb/controller/ehci.h>
   58 #include <dev/usb/controller/ehcireg.h>
   59 
   60 #include <machine/bus.h>
   61 #include <machine/resource.h>
   62 
   63 #include "gpio_if.h"
   64 #include "opt_platform.h"
   65 
   66 #define ENUTMILEVEL3    (1 << 15)
   67 #define ENUTMILEVEL2    (1 << 14)
   68 
   69 #define GPIO_USB_PWR    134
   70 
   71 #define USB_ID          0x000   /* Identification register */
   72 #define USB_HWGENERAL   0x004   /* Hardware General */
   73 #define USB_HWHOST      0x008   /* Host Hardware Parameters */
   74 #define USB_HWDEVICE    0x00C   /* Device Hardware Parameters */
   75 #define USB_HWTXBUF     0x010   /* TX Buffer Hardware Parameters */
   76 #define USB_HWRXBUF     0x014   /* RX Buffer Hardware Parameters */
   77 #define USB_HCSPARAMS   0x104   /* Host Controller Structural Parameters */
   78 
   79 #define USBPHY_PWD              0x00    /* PHY Power-Down Register */
   80 #define USBPHY_PWD_SET          0x04    /* PHY Power-Down Register */
   81 #define USBPHY_PWD_CLR          0x08    /* PHY Power-Down Register */
   82 #define USBPHY_PWD_TOG          0x0C    /* PHY Power-Down Register */
   83 #define USBPHY_TX               0x10    /* PHY Transmitter Control Register */
   84 #define USBPHY_RX               0x20    /* PHY Receiver Control Register */
   85 #define USBPHY_RX_SET           0x24    /* PHY Receiver Control Register */
   86 #define USBPHY_RX_CLR           0x28    /* PHY Receiver Control Register */
   87 #define USBPHY_RX_TOG           0x2C    /* PHY Receiver Control Register */
   88 #define USBPHY_CTRL             0x30    /* PHY General Control Register */
   89 #define USBPHY_CTRL_SET         0x34    /* PHY General Control Register */
   90 #define USBPHY_CTRL_CLR         0x38    /* PHY General Control Register */
   91 #define USBPHY_CTRL_TOG         0x3C    /* PHY General Control Register */
   92 #define USBPHY_STATUS           0x40    /* PHY Status Register */
   93 #define USBPHY_DEBUG            0x50    /* PHY Debug Register */
   94 #define USBPHY_DEBUG_SET        0x54    /* PHY Debug Register */
   95 #define USBPHY_DEBUG_CLR        0x58    /* PHY Debug Register */
   96 #define USBPHY_DEBUG_TOG        0x5C    /* PHY Debug Register */
   97 #define USBPHY_DEBUG0_STATUS    0x60    /* UTMI Debug Status Register 0 */
   98 #define USBPHY_DEBUG1           0x70    /* UTMI Debug Status Register 1 */
   99 #define USBPHY_DEBUG1_SET       0x74    /* UTMI Debug Status Register 1 */
  100 #define USBPHY_DEBUG1_CLR       0x78    /* UTMI Debug Status Register 1 */
  101 #define USBPHY_DEBUG1_TOG       0x7C    /* UTMI Debug Status Register 1 */
  102 #define USBPHY_VERSION          0x80    /* UTMI RTL Version */
  103 #define USBPHY_IP               0x90    /* PHY IP Block Register */
  104 #define USBPHY_IP_SET           0x94    /* PHY IP Block Register */
  105 #define USBPHY_IP_CLR           0x98    /* PHY IP Block Register */
  106 #define USBPHY_IP_TOG           0x9C    /* PHY IP Block Register */
  107 
  108 #define USBPHY_CTRL_SFTRST      (1U << 31)
  109 #define USBPHY_CTRL_CLKGATE     (1 << 30)
  110 #define USBPHY_DEBUG_CLKGATE    (1 << 30)
  111 
  112 #define PHY_READ4(_sc, _reg)            \
  113         bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
  114 #define PHY_WRITE4(_sc, _reg, _val)     \
  115         bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
  116 
  117 #define USBC_READ4(_sc, _reg)           \
  118         bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
  119 #define USBC_WRITE4(_sc, _reg, _val)    \
  120         bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
  121 
  122 /* Forward declarations */
  123 static int      vybrid_ehci_attach(device_t dev);
  124 static int      vybrid_ehci_detach(device_t dev);
  125 static int      vybrid_ehci_probe(device_t dev);
  126 
  127 struct vybrid_ehci_softc {
  128         ehci_softc_t            base;
  129         device_t                dev;
  130         struct resource         *res[6];
  131         bus_space_tag_t         bst_phy;
  132         bus_space_handle_t      bsh_phy;
  133         bus_space_tag_t         bst_usbc;
  134         bus_space_handle_t      bsh_usbc;
  135 };
  136 
  137 static struct resource_spec vybrid_ehci_spec[] = {
  138         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  139         { SYS_RES_MEMORY,       1,      RF_ACTIVE },
  140         { SYS_RES_MEMORY,       2,      RF_ACTIVE },
  141         { SYS_RES_IRQ,          0,      RF_ACTIVE },
  142         { -1, 0 }
  143 };
  144 
  145 static device_method_t ehci_methods[] = {
  146         /* Device interface */
  147         DEVMETHOD(device_probe, vybrid_ehci_probe),
  148         DEVMETHOD(device_attach, vybrid_ehci_attach),
  149         DEVMETHOD(device_detach, vybrid_ehci_detach),
  150         DEVMETHOD(device_suspend, bus_generic_suspend),
  151         DEVMETHOD(device_resume, bus_generic_resume),
  152         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  153 
  154         /* Bus interface */
  155         DEVMETHOD(bus_print_child, bus_generic_print_child),
  156 
  157         { 0, 0 }
  158 };
  159 
  160 /* kobj_class definition */
  161 static driver_t ehci_driver = {
  162         "ehci",
  163         ehci_methods,
  164         sizeof(ehci_softc_t)
  165 };
  166 
  167 static devclass_t ehci_devclass;
  168 
  169 DRIVER_MODULE(vybrid_ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
  170 MODULE_DEPEND(vybrid_ehci, usb, 1, 1, 1);
  171 
  172 static void
  173 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
  174 {
  175         uint32_t usbmode;
  176 
  177         /* Force HOST mode */
  178         usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
  179         usbmode &= ~EHCI_UM_CM;
  180         usbmode |= EHCI_UM_CM_HOST;
  181         EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
  182 }
  183 
  184 /*
  185  * Public methods
  186  */
  187 static int
  188 vybrid_ehci_probe(device_t dev)
  189 {
  190 
  191         if (!ofw_bus_status_okay(dev))
  192                 return (ENXIO);
  193 
  194         if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
  195                 return (ENXIO);
  196 
  197         device_set_desc(dev, "Vybrid Family integrated USB controller");
  198         return (BUS_PROBE_DEFAULT);
  199 }
  200 
  201 static int
  202 phy_init(struct vybrid_ehci_softc *esc)
  203 {
  204         device_t sc_gpio_dev;
  205         int reg;
  206 
  207         /* Reset phy */
  208         reg = PHY_READ4(esc, USBPHY_CTRL);
  209         reg |= (USBPHY_CTRL_SFTRST);
  210         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  211 
  212         /* Minimum reset time */
  213         DELAY(10000);
  214 
  215         reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
  216         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  217 
  218         reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
  219         PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
  220 
  221         /* Get the GPIO device, we need this to give power to USB */
  222         sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
  223         if (sc_gpio_dev == NULL) {
  224                 device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
  225                 return (1);
  226         }
  227 
  228         /* Give power to USB */
  229         GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
  230         GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
  231 
  232         /* Power up PHY */
  233         PHY_WRITE4(esc, USBPHY_PWD, 0x00);
  234 
  235         /* Ungate clocks */
  236         reg = PHY_READ4(esc, USBPHY_DEBUG);
  237         reg &= ~(USBPHY_DEBUG_CLKGATE);
  238         PHY_WRITE4(esc, USBPHY_DEBUG, reg);
  239 
  240 #if 0
  241         printf("USBPHY_CTRL == 0x%08x\n",
  242             PHY_READ4(esc, USBPHY_CTRL));
  243         printf("USBPHY_IP == 0x%08x\n",
  244             PHY_READ4(esc, USBPHY_IP));
  245         printf("USBPHY_STATUS == 0x%08x\n",
  246             PHY_READ4(esc, USBPHY_STATUS));
  247         printf("USBPHY_DEBUG == 0x%08x\n",
  248             PHY_READ4(esc, USBPHY_DEBUG));
  249         printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
  250             PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
  251         printf("USBPHY_DEBUG1 == 0x%08x\n",
  252             PHY_READ4(esc, USBPHY_DEBUG1));
  253 #endif
  254 
  255         return (0);
  256 }
  257 
  258 static int
  259 vybrid_ehci_attach(device_t dev)
  260 {
  261         struct vybrid_ehci_softc *esc;
  262         ehci_softc_t *sc;
  263         bus_space_handle_t bsh;
  264         int err;
  265         int reg;
  266 
  267         esc = device_get_softc(dev);
  268         esc->dev = dev;
  269 
  270         sc = &esc->base;
  271         sc->sc_bus.parent = dev;
  272         sc->sc_bus.devices = sc->sc_devices;
  273         sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
  274         sc->sc_bus.dma_bits = 32;
  275 
  276         if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
  277                 device_printf(dev, "could not allocate resources\n");
  278                 return (ENXIO);
  279         }
  280 
  281         /* EHCI registers */
  282         sc->sc_io_tag = rman_get_bustag(esc->res[0]);
  283         bsh = rman_get_bushandle(esc->res[0]);
  284         sc->sc_io_size = rman_get_size(esc->res[0]);
  285 
  286         esc->bst_usbc = rman_get_bustag(esc->res[1]);
  287         esc->bsh_usbc = rman_get_bushandle(esc->res[1]);
  288 
  289         esc->bst_phy = rman_get_bustag(esc->res[2]);
  290         esc->bsh_phy = rman_get_bushandle(esc->res[2]);
  291 
  292         /* get all DMA memory */
  293         if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
  294                 &ehci_iterate_hw_softc))
  295                 return (ENXIO);
  296 
  297 #if 0
  298         printf("USBx_HCSPARAMS is 0x%08x\n",
  299             bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS));
  300         printf("USB_ID == 0x%08x\n",
  301             bus_space_read_4(sc->sc_io_tag, bsh, USB_ID));
  302         printf("USB_HWGENERAL == 0x%08x\n",
  303             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL));
  304         printf("USB_HWHOST == 0x%08x\n",
  305             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST));
  306         printf("USB_HWDEVICE == 0x%08x\n",
  307             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE));
  308         printf("USB_HWTXBUF == 0x%08x\n",
  309             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF));
  310         printf("USB_HWRXBUF == 0x%08x\n",
  311             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF));
  312 #endif
  313 
  314         if (phy_init(esc)) {
  315                 device_printf(dev, "Could not setup PHY\n");
  316                 return (1);
  317         }
  318 
  319         /*
  320          * Set handle to USB related registers subregion used by
  321          * generic EHCI driver.
  322          */
  323         err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
  324             sc->sc_io_size, &sc->sc_io_hdl);
  325         if (err != 0)
  326                 return (ENXIO);
  327 
  328         /* Setup interrupt handler */
  329         err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
  330             NULL, (driver_intr_t *)ehci_interrupt, sc,
  331             &sc->sc_intr_hdl);
  332         if (err) {
  333                 device_printf(dev, "Could not setup irq, "
  334                     "%d\n", err);
  335                 return (1);
  336         }
  337 
  338         /* Add USB device */
  339         sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
  340         if (!sc->sc_bus.bdev) {
  341                 device_printf(dev, "Could not add USB device\n");
  342                 err = bus_teardown_intr(dev, esc->res[5],
  343                     sc->sc_intr_hdl);
  344                 if (err)
  345                         device_printf(dev, "Could not tear down irq,"
  346                             " %d\n", err);
  347                 return (1);
  348         }
  349         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
  350 
  351         strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
  352 
  353         /* Set host mode */
  354         reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8);
  355         reg |= 0x3;
  356         bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
  357 
  358         /* Set flags  and callbacks*/
  359         sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
  360         sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
  361         sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
  362 
  363         err = ehci_init(sc);
  364         if (!err) {
  365                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
  366                 err = device_probe_and_attach(sc->sc_bus.bdev);
  367         } else {
  368                 device_printf(dev, "USB init failed err=%d\n", err);
  369 
  370                 device_delete_child(dev, sc->sc_bus.bdev);
  371                 sc->sc_bus.bdev = NULL;
  372 
  373                 err = bus_teardown_intr(dev, esc->res[5],
  374                     sc->sc_intr_hdl);
  375                 if (err)
  376                         device_printf(dev, "Could not tear down irq,"
  377                             " %d\n", err);
  378                 return (1);
  379         }
  380         return (0);
  381 }
  382 
  383 static int
  384 vybrid_ehci_detach(device_t dev)
  385 {
  386         struct vybrid_ehci_softc *esc;
  387         ehci_softc_t *sc;
  388         int err;
  389 
  390         esc = device_get_softc(dev);
  391         sc = &esc->base;
  392 
  393         /* First detach all children; we can't detach if that fails. */
  394         if ((err = device_delete_children(dev)) != 0)
  395                 return (err);
  396 
  397         /*
  398          * only call ehci_detach() after ehci_init()
  399          */
  400         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
  401                 ehci_detach(sc);
  402                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
  403         }
  404 
  405         /*
  406          * Disable interrupts that might have been switched on in
  407          * ehci_init.
  408          */
  409         if (sc->sc_io_tag && sc->sc_io_hdl)
  410                 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl,
  411                     EHCI_USBINTR, 0);
  412 
  413         if (esc->res[5] && sc->sc_intr_hdl) {
  414                 err = bus_teardown_intr(dev, esc->res[5],
  415                     sc->sc_intr_hdl);
  416                 if (err) {
  417                         device_printf(dev, "Could not tear down irq,"
  418                             " %d\n", err);
  419                         return (err);
  420                 }
  421                 sc->sc_intr_hdl = NULL;
  422         }
  423 
  424         usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
  425 
  426         bus_release_resources(dev, vybrid_ehci_spec, esc->res);
  427 
  428         return (0);
  429 }

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