The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/vybrid/vf_ehci.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Vybrid Family Universal Serial Bus (USB) Controller
   31  * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __FBSDID("$FreeBSD$");
   36 
   37 #include "opt_bus.h"
   38 
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/kernel.h>
   42 #include <sys/module.h>
   43 #include <sys/bus.h>
   44 #include <sys/condvar.h>
   45 #include <sys/rman.h>
   46 #include <sys/gpio.h>
   47 
   48 #include <dev/ofw/ofw_bus.h>
   49 #include <dev/ofw/ofw_bus_subr.h>
   50 
   51 #include <dev/usb/usb.h>
   52 #include <dev/usb/usbdi.h>
   53 #include <dev/usb/usb_busdma.h>
   54 #include <dev/usb/usb_process.h>
   55 #include <dev/usb/usb_controller.h>
   56 #include <dev/usb/usb_bus.h>
   57 #include <dev/usb/controller/ehci.h>
   58 #include <dev/usb/controller/ehcireg.h>
   59 
   60 #include <machine/bus.h>
   61 #include <machine/resource.h>
   62 
   63 #include "gpio_if.h"
   64 #include "opt_platform.h"
   65 
   66 #define ENUTMILEVEL3    (1 << 15)
   67 #define ENUTMILEVEL2    (1 << 14)
   68 
   69 #define GPIO_USB_PWR    134
   70 
   71 #define USB_ID          0x000   /* Identification register */
   72 #define USB_HWGENERAL   0x004   /* Hardware General */
   73 #define USB_HWHOST      0x008   /* Host Hardware Parameters */
   74 #define USB_HWDEVICE    0x00C   /* Device Hardware Parameters */
   75 #define USB_HWTXBUF     0x010   /* TX Buffer Hardware Parameters */
   76 #define USB_HWRXBUF     0x014   /* RX Buffer Hardware Parameters */
   77 #define USB_HCSPARAMS   0x104   /* Host Controller Structural Parameters */
   78 
   79 #define USBPHY_PWD              0x00    /* PHY Power-Down Register */
   80 #define USBPHY_PWD_SET          0x04    /* PHY Power-Down Register */
   81 #define USBPHY_PWD_CLR          0x08    /* PHY Power-Down Register */
   82 #define USBPHY_PWD_TOG          0x0C    /* PHY Power-Down Register */
   83 #define USBPHY_TX               0x10    /* PHY Transmitter Control Register */
   84 #define USBPHY_RX               0x20    /* PHY Receiver Control Register */
   85 #define USBPHY_RX_SET           0x24    /* PHY Receiver Control Register */
   86 #define USBPHY_RX_CLR           0x28    /* PHY Receiver Control Register */
   87 #define USBPHY_RX_TOG           0x2C    /* PHY Receiver Control Register */
   88 #define USBPHY_CTRL             0x30    /* PHY General Control Register */
   89 #define USBPHY_CTRL_SET         0x34    /* PHY General Control Register */
   90 #define USBPHY_CTRL_CLR         0x38    /* PHY General Control Register */
   91 #define USBPHY_CTRL_TOG         0x3C    /* PHY General Control Register */
   92 #define USBPHY_STATUS           0x40    /* PHY Status Register */
   93 #define USBPHY_DEBUG            0x50    /* PHY Debug Register */
   94 #define USBPHY_DEBUG_SET        0x54    /* PHY Debug Register */
   95 #define USBPHY_DEBUG_CLR        0x58    /* PHY Debug Register */
   96 #define USBPHY_DEBUG_TOG        0x5C    /* PHY Debug Register */
   97 #define USBPHY_DEBUG0_STATUS    0x60    /* UTMI Debug Status Register 0 */
   98 #define USBPHY_DEBUG1           0x70    /* UTMI Debug Status Register 1 */
   99 #define USBPHY_DEBUG1_SET       0x74    /* UTMI Debug Status Register 1 */
  100 #define USBPHY_DEBUG1_CLR       0x78    /* UTMI Debug Status Register 1 */
  101 #define USBPHY_DEBUG1_TOG       0x7C    /* UTMI Debug Status Register 1 */
  102 #define USBPHY_VERSION          0x80    /* UTMI RTL Version */
  103 #define USBPHY_IP               0x90    /* PHY IP Block Register */
  104 #define USBPHY_IP_SET           0x94    /* PHY IP Block Register */
  105 #define USBPHY_IP_CLR           0x98    /* PHY IP Block Register */
  106 #define USBPHY_IP_TOG           0x9C    /* PHY IP Block Register */
  107 
  108 #define USBPHY_CTRL_SFTRST      (1U << 31)
  109 #define USBPHY_CTRL_CLKGATE     (1 << 30)
  110 #define USBPHY_DEBUG_CLKGATE    (1 << 30)
  111 
  112 #define PHY_READ4(_sc, _reg)            \
  113         bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
  114 #define PHY_WRITE4(_sc, _reg, _val)     \
  115         bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
  116 
  117 #define USBC_READ4(_sc, _reg)           \
  118         bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
  119 #define USBC_WRITE4(_sc, _reg, _val)    \
  120         bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
  121 
  122 /* Forward declarations */
  123 static int      vybrid_ehci_attach(device_t dev);
  124 static int      vybrid_ehci_detach(device_t dev);
  125 static int      vybrid_ehci_probe(device_t dev);
  126 
  127 struct vybrid_ehci_softc {
  128         ehci_softc_t            base;
  129         device_t                dev;
  130         struct resource         *res[6];
  131         bus_space_tag_t         bst_phy;
  132         bus_space_handle_t      bsh_phy;
  133         bus_space_tag_t         bst_usbc;
  134         bus_space_handle_t      bsh_usbc;
  135 };
  136 
  137 static struct resource_spec vybrid_ehci_spec[] = {
  138         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  139         { SYS_RES_MEMORY,       1,      RF_ACTIVE },
  140         { SYS_RES_MEMORY,       2,      RF_ACTIVE },
  141         { SYS_RES_IRQ,          0,      RF_ACTIVE },
  142         { -1, 0 }
  143 };
  144 
  145 static device_method_t ehci_methods[] = {
  146         /* Device interface */
  147         DEVMETHOD(device_probe, vybrid_ehci_probe),
  148         DEVMETHOD(device_attach, vybrid_ehci_attach),
  149         DEVMETHOD(device_detach, vybrid_ehci_detach),
  150         DEVMETHOD(device_suspend, bus_generic_suspend),
  151         DEVMETHOD(device_resume, bus_generic_resume),
  152         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  153 
  154         /* Bus interface */
  155         DEVMETHOD(bus_print_child, bus_generic_print_child),
  156         { 0, 0 }
  157 };
  158 
  159 /* kobj_class definition */
  160 static driver_t ehci_driver = {
  161         "ehci",
  162         ehci_methods,
  163         sizeof(ehci_softc_t)
  164 };
  165 
  166 DRIVER_MODULE(vybrid_ehci, simplebus, ehci_driver, 0, 0);
  167 MODULE_DEPEND(vybrid_ehci, usb, 1, 1, 1);
  168 
  169 static void
  170 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
  171 {
  172         uint32_t usbmode;
  173 
  174         /* Force HOST mode */
  175         usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
  176         usbmode &= ~EHCI_UM_CM;
  177         usbmode |= EHCI_UM_CM_HOST;
  178         EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
  179 }
  180 
  181 /*
  182  * Public methods
  183  */
  184 static int
  185 vybrid_ehci_probe(device_t dev)
  186 {
  187 
  188         if (!ofw_bus_status_okay(dev))
  189                 return (ENXIO);
  190 
  191         if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
  192                 return (ENXIO);
  193 
  194         device_set_desc(dev, "Vybrid Family integrated USB controller");
  195         return (BUS_PROBE_DEFAULT);
  196 }
  197 
  198 static int
  199 phy_init(struct vybrid_ehci_softc *esc)
  200 {
  201         device_t sc_gpio_dev;
  202         int reg;
  203 
  204         /* Reset phy */
  205         reg = PHY_READ4(esc, USBPHY_CTRL);
  206         reg |= (USBPHY_CTRL_SFTRST);
  207         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  208 
  209         /* Minimum reset time */
  210         DELAY(10000);
  211 
  212         reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
  213         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  214 
  215         reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
  216         PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
  217 
  218         /* Get the GPIO device, we need this to give power to USB */
  219         sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
  220         if (sc_gpio_dev == NULL) {
  221                 device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
  222                 return (1);
  223         }
  224 
  225         /* Give power to USB */
  226         GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
  227         GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
  228 
  229         /* Power up PHY */
  230         PHY_WRITE4(esc, USBPHY_PWD, 0x00);
  231 
  232         /* Ungate clocks */
  233         reg = PHY_READ4(esc, USBPHY_DEBUG);
  234         reg &= ~(USBPHY_DEBUG_CLKGATE);
  235         PHY_WRITE4(esc, USBPHY_DEBUG, reg);
  236 
  237 #if 0
  238         printf("USBPHY_CTRL == 0x%08x\n",
  239             PHY_READ4(esc, USBPHY_CTRL));
  240         printf("USBPHY_IP == 0x%08x\n",
  241             PHY_READ4(esc, USBPHY_IP));
  242         printf("USBPHY_STATUS == 0x%08x\n",
  243             PHY_READ4(esc, USBPHY_STATUS));
  244         printf("USBPHY_DEBUG == 0x%08x\n",
  245             PHY_READ4(esc, USBPHY_DEBUG));
  246         printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
  247             PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
  248         printf("USBPHY_DEBUG1 == 0x%08x\n",
  249             PHY_READ4(esc, USBPHY_DEBUG1));
  250 #endif
  251 
  252         return (0);
  253 }
  254 
  255 static int
  256 vybrid_ehci_attach(device_t dev)
  257 {
  258         struct vybrid_ehci_softc *esc;
  259         ehci_softc_t *sc;
  260         bus_space_handle_t bsh;
  261         int err;
  262         int reg;
  263 
  264         esc = device_get_softc(dev);
  265         esc->dev = dev;
  266 
  267         sc = &esc->base;
  268         sc->sc_bus.parent = dev;
  269         sc->sc_bus.devices = sc->sc_devices;
  270         sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
  271         sc->sc_bus.dma_bits = 32;
  272 
  273         if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
  274                 device_printf(dev, "could not allocate resources\n");
  275                 return (ENXIO);
  276         }
  277 
  278         /* EHCI registers */
  279         sc->sc_io_tag = rman_get_bustag(esc->res[0]);
  280         bsh = rman_get_bushandle(esc->res[0]);
  281         sc->sc_io_size = rman_get_size(esc->res[0]);
  282 
  283         esc->bst_usbc = rman_get_bustag(esc->res[1]);
  284         esc->bsh_usbc = rman_get_bushandle(esc->res[1]);
  285 
  286         esc->bst_phy = rman_get_bustag(esc->res[2]);
  287         esc->bsh_phy = rman_get_bushandle(esc->res[2]);
  288 
  289         /* get all DMA memory */
  290         if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
  291                 &ehci_iterate_hw_softc))
  292                 return (ENXIO);
  293 
  294 #if 0
  295         printf("USBx_HCSPARAMS is 0x%08x\n",
  296             bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS));
  297         printf("USB_ID == 0x%08x\n",
  298             bus_space_read_4(sc->sc_io_tag, bsh, USB_ID));
  299         printf("USB_HWGENERAL == 0x%08x\n",
  300             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL));
  301         printf("USB_HWHOST == 0x%08x\n",
  302             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST));
  303         printf("USB_HWDEVICE == 0x%08x\n",
  304             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE));
  305         printf("USB_HWTXBUF == 0x%08x\n",
  306             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF));
  307         printf("USB_HWRXBUF == 0x%08x\n",
  308             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF));
  309 #endif
  310 
  311         if (phy_init(esc)) {
  312                 device_printf(dev, "Could not setup PHY\n");
  313                 return (1);
  314         }
  315 
  316         /*
  317          * Set handle to USB related registers subregion used by
  318          * generic EHCI driver.
  319          */
  320         err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
  321             sc->sc_io_size, &sc->sc_io_hdl);
  322         if (err != 0)
  323                 return (ENXIO);
  324 
  325         /* Setup interrupt handler */
  326         err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
  327             NULL, (driver_intr_t *)ehci_interrupt, sc,
  328             &sc->sc_intr_hdl);
  329         if (err) {
  330                 device_printf(dev, "Could not setup irq, "
  331                     "%d\n", err);
  332                 return (1);
  333         }
  334 
  335         /* Add USB device */
  336         sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
  337         if (!sc->sc_bus.bdev) {
  338                 device_printf(dev, "Could not add USB device\n");
  339                 err = bus_teardown_intr(dev, esc->res[5],
  340                     sc->sc_intr_hdl);
  341                 if (err)
  342                         device_printf(dev, "Could not tear down irq,"
  343                             " %d\n", err);
  344                 return (1);
  345         }
  346         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
  347 
  348         strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
  349 
  350         /* Set host mode */
  351         reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8);
  352         reg |= 0x3;
  353         bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
  354 
  355         /* Set flags  and callbacks*/
  356         sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
  357         sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
  358         sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
  359 
  360         err = ehci_init(sc);
  361         if (!err) {
  362                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
  363                 err = device_probe_and_attach(sc->sc_bus.bdev);
  364         } else {
  365                 device_printf(dev, "USB init failed err=%d\n", err);
  366 
  367                 device_delete_child(dev, sc->sc_bus.bdev);
  368                 sc->sc_bus.bdev = NULL;
  369 
  370                 err = bus_teardown_intr(dev, esc->res[5],
  371                     sc->sc_intr_hdl);
  372                 if (err)
  373                         device_printf(dev, "Could not tear down irq,"
  374                             " %d\n", err);
  375                 return (1);
  376         }
  377         return (0);
  378 }
  379 
  380 static int
  381 vybrid_ehci_detach(device_t dev)
  382 {
  383         struct vybrid_ehci_softc *esc;
  384         ehci_softc_t *sc;
  385         int err;
  386 
  387         esc = device_get_softc(dev);
  388         sc = &esc->base;
  389 
  390         /* First detach all children; we can't detach if that fails. */
  391         if ((err = device_delete_children(dev)) != 0)
  392                 return (err);
  393 
  394         /*
  395          * only call ehci_detach() after ehci_init()
  396          */
  397         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
  398                 ehci_detach(sc);
  399                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
  400         }
  401 
  402         /*
  403          * Disable interrupts that might have been switched on in
  404          * ehci_init.
  405          */
  406         if (sc->sc_io_tag && sc->sc_io_hdl)
  407                 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl,
  408                     EHCI_USBINTR, 0);
  409 
  410         if (esc->res[5] && sc->sc_intr_hdl) {
  411                 err = bus_teardown_intr(dev, esc->res[5],
  412                     sc->sc_intr_hdl);
  413                 if (err) {
  414                         device_printf(dev, "Could not tear down irq,"
  415                             " %d\n", err);
  416                         return (err);
  417                 }
  418                 sc->sc_intr_hdl = NULL;
  419         }
  420 
  421         usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
  422 
  423         bus_release_resources(dev, vybrid_ehci_spec, esc->res);
  424 
  425         return (0);
  426 }

Cache object: 272a06ce7c862b11267a46505f0bb7e4


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