The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/vybrid/vf_ehci.c

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    1 /*-
    2  * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 /*
   28  * Vybrid Family Universal Serial Bus (USB) Controller
   29  * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD: releng/10.3/sys/arm/freescale/vybrid/vf_ehci.c 278278 2015-02-05 20:03:02Z hselasky $");
   34 
   35 #include "opt_bus.h"
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #include <sys/kernel.h>
   40 #include <sys/module.h>
   41 #include <sys/bus.h>
   42 #include <sys/condvar.h>
   43 #include <sys/rman.h>
   44 #include <sys/gpio.h>
   45 
   46 #include <dev/ofw/ofw_bus.h>
   47 #include <dev/ofw/ofw_bus_subr.h>
   48 
   49 #include <dev/usb/usb.h>
   50 #include <dev/usb/usbdi.h>
   51 #include <dev/usb/usb_busdma.h>
   52 #include <dev/usb/usb_process.h>
   53 #include <dev/usb/usb_controller.h>
   54 #include <dev/usb/usb_bus.h>
   55 #include <dev/usb/controller/ehci.h>
   56 #include <dev/usb/controller/ehcireg.h>
   57 
   58 #include <dev/fdt/fdt_common.h>
   59 
   60 #include <machine/bus.h>
   61 #include <machine/resource.h>
   62 
   63 #include "gpio_if.h"
   64 #include "opt_platform.h"
   65 
   66 #define ENUTMILEVEL3    (1 << 15)
   67 #define ENUTMILEVEL2    (1 << 14)
   68 
   69 #define GPIO_USB_PWR    134
   70 
   71 #define USB_ID          0x000   /* Identification register */
   72 #define USB_HWGENERAL   0x004   /* Hardware General */
   73 #define USB_HWHOST      0x008   /* Host Hardware Parameters */
   74 #define USB_HWDEVICE    0x00C   /* Device Hardware Parameters */
   75 #define USB_HWTXBUF     0x010   /* TX Buffer Hardware Parameters */
   76 #define USB_HWRXBUF     0x014   /* RX Buffer Hardware Parameters */
   77 #define USB_HCSPARAMS   0x104   /* Host Controller Structural Parameters */
   78 
   79 #define USBPHY_PWD              0x00    /* PHY Power-Down Register */
   80 #define USBPHY_PWD_SET          0x04    /* PHY Power-Down Register */
   81 #define USBPHY_PWD_CLR          0x08    /* PHY Power-Down Register */
   82 #define USBPHY_PWD_TOG          0x0C    /* PHY Power-Down Register */
   83 #define USBPHY_TX               0x10    /* PHY Transmitter Control Register */
   84 #define USBPHY_RX               0x20    /* PHY Receiver Control Register */
   85 #define USBPHY_RX_SET           0x24    /* PHY Receiver Control Register */
   86 #define USBPHY_RX_CLR           0x28    /* PHY Receiver Control Register */
   87 #define USBPHY_RX_TOG           0x2C    /* PHY Receiver Control Register */
   88 #define USBPHY_CTRL             0x30    /* PHY General Control Register */
   89 #define USBPHY_CTRL_SET         0x34    /* PHY General Control Register */
   90 #define USBPHY_CTRL_CLR         0x38    /* PHY General Control Register */
   91 #define USBPHY_CTRL_TOG         0x3C    /* PHY General Control Register */
   92 #define USBPHY_STATUS           0x40    /* PHY Status Register */
   93 #define USBPHY_DEBUG            0x50    /* PHY Debug Register */
   94 #define USBPHY_DEBUG_SET        0x54    /* PHY Debug Register */
   95 #define USBPHY_DEBUG_CLR        0x58    /* PHY Debug Register */
   96 #define USBPHY_DEBUG_TOG        0x5C    /* PHY Debug Register */
   97 #define USBPHY_DEBUG0_STATUS    0x60    /* UTMI Debug Status Register 0 */
   98 #define USBPHY_DEBUG1           0x70    /* UTMI Debug Status Register 1 */
   99 #define USBPHY_DEBUG1_SET       0x74    /* UTMI Debug Status Register 1 */
  100 #define USBPHY_DEBUG1_CLR       0x78    /* UTMI Debug Status Register 1 */
  101 #define USBPHY_DEBUG1_TOG       0x7C    /* UTMI Debug Status Register 1 */
  102 #define USBPHY_VERSION          0x80    /* UTMI RTL Version */
  103 #define USBPHY_IP               0x90    /* PHY IP Block Register */
  104 #define USBPHY_IP_SET           0x94    /* PHY IP Block Register */
  105 #define USBPHY_IP_CLR           0x98    /* PHY IP Block Register */
  106 #define USBPHY_IP_TOG           0x9C    /* PHY IP Block Register */
  107 
  108 #define USBPHY_CTRL_SFTRST      (1 << 31)
  109 #define USBPHY_CTRL_CLKGATE     (1 << 30)
  110 #define USBPHY_DEBUG_CLKGATE    (1 << 30)
  111 
  112 #define PHY_READ4(_sc, _reg)            \
  113         bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
  114 #define PHY_WRITE4(_sc, _reg, _val)     \
  115         bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
  116 
  117 #define USBC_READ4(_sc, _reg)           \
  118         bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
  119 #define USBC_WRITE4(_sc, _reg, _val)    \
  120         bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
  121 
  122 /* Forward declarations */
  123 static int      vybrid_ehci_attach(device_t dev);
  124 static int      vybrid_ehci_detach(device_t dev);
  125 static int      vybrid_ehci_probe(device_t dev);
  126 
  127 struct vybrid_ehci_softc {
  128         ehci_softc_t            base;
  129         device_t                dev;
  130         struct resource         *res[6];
  131         bus_space_tag_t         bst_phy;
  132         bus_space_handle_t      bsh_phy;
  133         bus_space_tag_t         bst_usbc;
  134         bus_space_handle_t      bsh_usbc;
  135 };
  136 
  137 static struct resource_spec vybrid_ehci_spec[] = {
  138         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  139         { SYS_RES_MEMORY,       1,      RF_ACTIVE },
  140         { SYS_RES_MEMORY,       2,      RF_ACTIVE },
  141         { SYS_RES_IRQ,          0,      RF_ACTIVE },
  142         { -1, 0 }
  143 };
  144 
  145 static device_method_t ehci_methods[] = {
  146         /* Device interface */
  147         DEVMETHOD(device_probe, vybrid_ehci_probe),
  148         DEVMETHOD(device_attach, vybrid_ehci_attach),
  149         DEVMETHOD(device_detach, vybrid_ehci_detach),
  150         DEVMETHOD(device_suspend, bus_generic_suspend),
  151         DEVMETHOD(device_resume, bus_generic_resume),
  152         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  153 
  154         /* Bus interface */
  155         DEVMETHOD(bus_print_child, bus_generic_print_child),
  156 
  157         { 0, 0 }
  158 };
  159 
  160 /* kobj_class definition */
  161 static driver_t ehci_driver = {
  162         "ehci",
  163         ehci_methods,
  164         sizeof(ehci_softc_t)
  165 };
  166 
  167 static devclass_t ehci_devclass;
  168 
  169 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
  170 MODULE_DEPEND(ehci, usb, 1, 1, 1);
  171 
  172 /*
  173  * Public methods
  174  */
  175 static int
  176 vybrid_ehci_probe(device_t dev)
  177 {
  178 
  179         if (!ofw_bus_status_okay(dev))
  180                 return (ENXIO);
  181 
  182         if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
  183                 return (ENXIO);
  184 
  185         device_set_desc(dev, "Vybrid Family integrated USB controller");
  186         return (BUS_PROBE_DEFAULT);
  187 }
  188 
  189 static int
  190 phy_init(struct vybrid_ehci_softc *esc)
  191 {
  192         device_t sc_gpio_dev;
  193         int reg;
  194 
  195         /* Reset phy */
  196         reg = PHY_READ4(esc, USBPHY_CTRL);
  197         reg |= (USBPHY_CTRL_SFTRST);
  198         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  199 
  200         /* Minimum reset time */
  201         DELAY(10000);
  202 
  203         reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
  204         PHY_WRITE4(esc, USBPHY_CTRL, reg);
  205 
  206         reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
  207         PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
  208 
  209         /* Get the GPIO device, we need this to give power to USB */
  210         sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
  211         if (sc_gpio_dev == NULL) {
  212                 device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
  213                 return (1);
  214         }
  215 
  216         /* Give power to USB */
  217         GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
  218         GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
  219 
  220         /* Power up PHY */
  221         PHY_WRITE4(esc, USBPHY_PWD, 0x00);
  222 
  223         /* Ungate clocks */
  224         reg = PHY_READ4(esc, USBPHY_DEBUG);
  225         reg &= ~(USBPHY_DEBUG_CLKGATE);
  226         PHY_WRITE4(esc, USBPHY_DEBUG, reg);
  227 
  228 #if 0
  229         printf("USBPHY_CTRL == 0x%08x\n",
  230             PHY_READ4(esc, USBPHY_CTRL));
  231         printf("USBPHY_IP == 0x%08x\n",
  232             PHY_READ4(esc, USBPHY_IP));
  233         printf("USBPHY_STATUS == 0x%08x\n",
  234             PHY_READ4(esc, USBPHY_STATUS));
  235         printf("USBPHY_DEBUG == 0x%08x\n",
  236             PHY_READ4(esc, USBPHY_DEBUG));
  237         printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
  238             PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
  239         printf("USBPHY_DEBUG1 == 0x%08x\n",
  240             PHY_READ4(esc, USBPHY_DEBUG1));
  241 #endif
  242 
  243         return (0);
  244 }
  245 
  246 static int
  247 vybrid_ehci_attach(device_t dev)
  248 {
  249         struct vybrid_ehci_softc *esc;
  250         ehci_softc_t *sc;
  251         bus_space_handle_t bsh;
  252         int err;
  253         int reg;
  254 
  255         esc = device_get_softc(dev);
  256         esc->dev = dev;
  257 
  258         sc = &esc->base;
  259         sc->sc_bus.parent = dev;
  260         sc->sc_bus.devices = sc->sc_devices;
  261         sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
  262         sc->sc_bus.dma_bits = 32;
  263 
  264         if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
  265                 device_printf(dev, "could not allocate resources\n");
  266                 return (ENXIO);
  267         }
  268 
  269         /* EHCI registers */
  270         sc->sc_io_tag = rman_get_bustag(esc->res[0]);
  271         bsh = rman_get_bushandle(esc->res[0]);
  272         sc->sc_io_size = rman_get_size(esc->res[0]);
  273 
  274         esc->bst_usbc = rman_get_bustag(esc->res[1]);
  275         esc->bsh_usbc = rman_get_bushandle(esc->res[1]);
  276 
  277         esc->bst_phy = rman_get_bustag(esc->res[2]);
  278         esc->bsh_phy = rman_get_bushandle(esc->res[2]);
  279 
  280         /* get all DMA memory */
  281         if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
  282                 &ehci_iterate_hw_softc))
  283                 return (ENXIO);
  284 
  285 #if 0
  286         printf("USBx_HCSPARAMS is 0x%08x\n",
  287             bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS));
  288         printf("USB_ID == 0x%08x\n",
  289             bus_space_read_4(sc->sc_io_tag, bsh, USB_ID));
  290         printf("USB_HWGENERAL == 0x%08x\n",
  291             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL));
  292         printf("USB_HWHOST == 0x%08x\n",
  293             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST));
  294         printf("USB_HWDEVICE == 0x%08x\n",
  295             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE));
  296         printf("USB_HWTXBUF == 0x%08x\n",
  297             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF));
  298         printf("USB_HWRXBUF == 0x%08x\n",
  299             bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF));
  300 #endif
  301 
  302         if (phy_init(esc)) {
  303                 device_printf(dev, "Could not setup PHY\n");
  304                 return (1);
  305         }
  306 
  307         /*
  308          * Set handle to USB related registers subregion used by
  309          * generic EHCI driver.
  310          */
  311         err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
  312             sc->sc_io_size, &sc->sc_io_hdl);
  313         if (err != 0)
  314                 return (ENXIO);
  315 
  316         /* Setup interrupt handler */
  317         err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
  318             NULL, (driver_intr_t *)ehci_interrupt, sc,
  319             &sc->sc_intr_hdl);
  320         if (err) {
  321                 device_printf(dev, "Could not setup irq, "
  322                     "%d\n", err);
  323                 return (1);
  324         }
  325 
  326         /* Add USB device */
  327         sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
  328         if (!sc->sc_bus.bdev) {
  329                 device_printf(dev, "Could not add USB device\n");
  330                 err = bus_teardown_intr(dev, esc->res[5],
  331                     sc->sc_intr_hdl);
  332                 if (err)
  333                         device_printf(dev, "Could not tear down irq,"
  334                             " %d\n", err);
  335                 return (1);
  336         }
  337         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
  338 
  339         strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
  340 
  341         /* Set host mode */
  342         reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8);
  343         reg |= 0x3;
  344         bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
  345 
  346         /* Set flags */
  347         sc->sc_flags |= EHCI_SCFLG_SETMODE | EHCI_SCFLG_NORESTERM;
  348 
  349         err = ehci_init(sc);
  350         if (!err) {
  351                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
  352                 err = device_probe_and_attach(sc->sc_bus.bdev);
  353         } else {
  354                 device_printf(dev, "USB init failed err=%d\n", err);
  355 
  356                 device_delete_child(dev, sc->sc_bus.bdev);
  357                 sc->sc_bus.bdev = NULL;
  358 
  359                 err = bus_teardown_intr(dev, esc->res[5],
  360                     sc->sc_intr_hdl);
  361                 if (err)
  362                         device_printf(dev, "Could not tear down irq,"
  363                             " %d\n", err);
  364                 return (1);
  365         }
  366         return (0);
  367 }
  368 
  369 static int
  370 vybrid_ehci_detach(device_t dev)
  371 {
  372         struct vybrid_ehci_softc *esc;
  373         ehci_softc_t *sc;
  374         int err;
  375 
  376         esc = device_get_softc(dev);
  377         sc = &esc->base;
  378 
  379         if (sc->sc_flags & EHCI_SCFLG_DONEINIT)
  380                 return (0);
  381 
  382         /*
  383          * only call ehci_detach() after ehci_init()
  384          */
  385         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
  386                 ehci_detach(sc);
  387                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
  388         }
  389 
  390         /*
  391          * Disable interrupts that might have been switched on in
  392          * ehci_init.
  393          */
  394         if (sc->sc_io_tag && sc->sc_io_hdl)
  395                 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl,
  396                     EHCI_USBINTR, 0);
  397 
  398         if (esc->res[5] && sc->sc_intr_hdl) {
  399                 err = bus_teardown_intr(dev, esc->res[5],
  400                     sc->sc_intr_hdl);
  401                 if (err) {
  402                         device_printf(dev, "Could not tear down irq,"
  403                             " %d\n", err);
  404                         return (err);
  405                 }
  406                 sc->sc_intr_hdl = NULL;
  407         }
  408 
  409         if (sc->sc_bus.bdev) {
  410                 device_delete_child(dev, sc->sc_bus.bdev);
  411                 sc->sc_bus.bdev = NULL;
  412         }
  413 
  414         /* During module unload there are lots of children leftover */
  415         device_delete_children(dev);
  416 
  417         bus_release_resources(dev, vybrid_ehci_spec, esc->res);
  418 
  419         return (0);
  420 }

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