1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * Vybrid Family Universal Serial Bus (USB) Controller
31 * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
32 */
33
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36
37 #include "opt_bus.h"
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/bus.h>
44 #include <sys/condvar.h>
45 #include <sys/rman.h>
46 #include <sys/gpio.h>
47
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50
51 #include <dev/usb/usb.h>
52 #include <dev/usb/usbdi.h>
53 #include <dev/usb/usb_busdma.h>
54 #include <dev/usb/usb_process.h>
55 #include <dev/usb/usb_controller.h>
56 #include <dev/usb/usb_bus.h>
57 #include <dev/usb/controller/ehci.h>
58 #include <dev/usb/controller/ehcireg.h>
59
60 #include <machine/bus.h>
61 #include <machine/resource.h>
62
63 #include "gpio_if.h"
64 #include "opt_platform.h"
65
66 #define ENUTMILEVEL3 (1 << 15)
67 #define ENUTMILEVEL2 (1 << 14)
68
69 #define GPIO_USB_PWR 134
70
71 #define USB_ID 0x000 /* Identification register */
72 #define USB_HWGENERAL 0x004 /* Hardware General */
73 #define USB_HWHOST 0x008 /* Host Hardware Parameters */
74 #define USB_HWDEVICE 0x00C /* Device Hardware Parameters */
75 #define USB_HWTXBUF 0x010 /* TX Buffer Hardware Parameters */
76 #define USB_HWRXBUF 0x014 /* RX Buffer Hardware Parameters */
77 #define USB_HCSPARAMS 0x104 /* Host Controller Structural Parameters */
78
79 #define USBPHY_PWD 0x00 /* PHY Power-Down Register */
80 #define USBPHY_PWD_SET 0x04 /* PHY Power-Down Register */
81 #define USBPHY_PWD_CLR 0x08 /* PHY Power-Down Register */
82 #define USBPHY_PWD_TOG 0x0C /* PHY Power-Down Register */
83 #define USBPHY_TX 0x10 /* PHY Transmitter Control Register */
84 #define USBPHY_RX 0x20 /* PHY Receiver Control Register */
85 #define USBPHY_RX_SET 0x24 /* PHY Receiver Control Register */
86 #define USBPHY_RX_CLR 0x28 /* PHY Receiver Control Register */
87 #define USBPHY_RX_TOG 0x2C /* PHY Receiver Control Register */
88 #define USBPHY_CTRL 0x30 /* PHY General Control Register */
89 #define USBPHY_CTRL_SET 0x34 /* PHY General Control Register */
90 #define USBPHY_CTRL_CLR 0x38 /* PHY General Control Register */
91 #define USBPHY_CTRL_TOG 0x3C /* PHY General Control Register */
92 #define USBPHY_STATUS 0x40 /* PHY Status Register */
93 #define USBPHY_DEBUG 0x50 /* PHY Debug Register */
94 #define USBPHY_DEBUG_SET 0x54 /* PHY Debug Register */
95 #define USBPHY_DEBUG_CLR 0x58 /* PHY Debug Register */
96 #define USBPHY_DEBUG_TOG 0x5C /* PHY Debug Register */
97 #define USBPHY_DEBUG0_STATUS 0x60 /* UTMI Debug Status Register 0 */
98 #define USBPHY_DEBUG1 0x70 /* UTMI Debug Status Register 1 */
99 #define USBPHY_DEBUG1_SET 0x74 /* UTMI Debug Status Register 1 */
100 #define USBPHY_DEBUG1_CLR 0x78 /* UTMI Debug Status Register 1 */
101 #define USBPHY_DEBUG1_TOG 0x7C /* UTMI Debug Status Register 1 */
102 #define USBPHY_VERSION 0x80 /* UTMI RTL Version */
103 #define USBPHY_IP 0x90 /* PHY IP Block Register */
104 #define USBPHY_IP_SET 0x94 /* PHY IP Block Register */
105 #define USBPHY_IP_CLR 0x98 /* PHY IP Block Register */
106 #define USBPHY_IP_TOG 0x9C /* PHY IP Block Register */
107
108 #define USBPHY_CTRL_SFTRST (1U << 31)
109 #define USBPHY_CTRL_CLKGATE (1 << 30)
110 #define USBPHY_DEBUG_CLKGATE (1 << 30)
111
112 #define PHY_READ4(_sc, _reg) \
113 bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
114 #define PHY_WRITE4(_sc, _reg, _val) \
115 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
116
117 #define USBC_READ4(_sc, _reg) \
118 bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
119 #define USBC_WRITE4(_sc, _reg, _val) \
120 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
121
122 /* Forward declarations */
123 static int vybrid_ehci_attach(device_t dev);
124 static int vybrid_ehci_detach(device_t dev);
125 static int vybrid_ehci_probe(device_t dev);
126
127 struct vybrid_ehci_softc {
128 ehci_softc_t base;
129 device_t dev;
130 struct resource *res[6];
131 bus_space_tag_t bst_phy;
132 bus_space_handle_t bsh_phy;
133 bus_space_tag_t bst_usbc;
134 bus_space_handle_t bsh_usbc;
135 };
136
137 static struct resource_spec vybrid_ehci_spec[] = {
138 { SYS_RES_MEMORY, 0, RF_ACTIVE },
139 { SYS_RES_MEMORY, 1, RF_ACTIVE },
140 { SYS_RES_MEMORY, 2, RF_ACTIVE },
141 { SYS_RES_IRQ, 0, RF_ACTIVE },
142 { -1, 0 }
143 };
144
145 static device_method_t ehci_methods[] = {
146 /* Device interface */
147 DEVMETHOD(device_probe, vybrid_ehci_probe),
148 DEVMETHOD(device_attach, vybrid_ehci_attach),
149 DEVMETHOD(device_detach, vybrid_ehci_detach),
150 DEVMETHOD(device_suspend, bus_generic_suspend),
151 DEVMETHOD(device_resume, bus_generic_resume),
152 DEVMETHOD(device_shutdown, bus_generic_shutdown),
153
154 /* Bus interface */
155 DEVMETHOD(bus_print_child, bus_generic_print_child),
156 { 0, 0 }
157 };
158
159 /* kobj_class definition */
160 static driver_t ehci_driver = {
161 "ehci",
162 ehci_methods,
163 sizeof(ehci_softc_t)
164 };
165
166 static devclass_t ehci_devclass;
167
168 DRIVER_MODULE(vybrid_ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
169 MODULE_DEPEND(vybrid_ehci, usb, 1, 1, 1);
170
171 static void
172 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
173 {
174 uint32_t usbmode;
175
176 /* Force HOST mode */
177 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
178 usbmode &= ~EHCI_UM_CM;
179 usbmode |= EHCI_UM_CM_HOST;
180 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
181 }
182
183 /*
184 * Public methods
185 */
186 static int
187 vybrid_ehci_probe(device_t dev)
188 {
189
190 if (!ofw_bus_status_okay(dev))
191 return (ENXIO);
192
193 if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
194 return (ENXIO);
195
196 device_set_desc(dev, "Vybrid Family integrated USB controller");
197 return (BUS_PROBE_DEFAULT);
198 }
199
200 static int
201 phy_init(struct vybrid_ehci_softc *esc)
202 {
203 device_t sc_gpio_dev;
204 int reg;
205
206 /* Reset phy */
207 reg = PHY_READ4(esc, USBPHY_CTRL);
208 reg |= (USBPHY_CTRL_SFTRST);
209 PHY_WRITE4(esc, USBPHY_CTRL, reg);
210
211 /* Minimum reset time */
212 DELAY(10000);
213
214 reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
215 PHY_WRITE4(esc, USBPHY_CTRL, reg);
216
217 reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
218 PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
219
220 /* Get the GPIO device, we need this to give power to USB */
221 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
222 if (sc_gpio_dev == NULL) {
223 device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
224 return (1);
225 }
226
227 /* Give power to USB */
228 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
229 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
230
231 /* Power up PHY */
232 PHY_WRITE4(esc, USBPHY_PWD, 0x00);
233
234 /* Ungate clocks */
235 reg = PHY_READ4(esc, USBPHY_DEBUG);
236 reg &= ~(USBPHY_DEBUG_CLKGATE);
237 PHY_WRITE4(esc, USBPHY_DEBUG, reg);
238
239 #if 0
240 printf("USBPHY_CTRL == 0x%08x\n",
241 PHY_READ4(esc, USBPHY_CTRL));
242 printf("USBPHY_IP == 0x%08x\n",
243 PHY_READ4(esc, USBPHY_IP));
244 printf("USBPHY_STATUS == 0x%08x\n",
245 PHY_READ4(esc, USBPHY_STATUS));
246 printf("USBPHY_DEBUG == 0x%08x\n",
247 PHY_READ4(esc, USBPHY_DEBUG));
248 printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
249 PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
250 printf("USBPHY_DEBUG1 == 0x%08x\n",
251 PHY_READ4(esc, USBPHY_DEBUG1));
252 #endif
253
254 return (0);
255 }
256
257 static int
258 vybrid_ehci_attach(device_t dev)
259 {
260 struct vybrid_ehci_softc *esc;
261 ehci_softc_t *sc;
262 bus_space_handle_t bsh;
263 int err;
264 int reg;
265
266 esc = device_get_softc(dev);
267 esc->dev = dev;
268
269 sc = &esc->base;
270 sc->sc_bus.parent = dev;
271 sc->sc_bus.devices = sc->sc_devices;
272 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
273 sc->sc_bus.dma_bits = 32;
274
275 if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
276 device_printf(dev, "could not allocate resources\n");
277 return (ENXIO);
278 }
279
280 /* EHCI registers */
281 sc->sc_io_tag = rman_get_bustag(esc->res[0]);
282 bsh = rman_get_bushandle(esc->res[0]);
283 sc->sc_io_size = rman_get_size(esc->res[0]);
284
285 esc->bst_usbc = rman_get_bustag(esc->res[1]);
286 esc->bsh_usbc = rman_get_bushandle(esc->res[1]);
287
288 esc->bst_phy = rman_get_bustag(esc->res[2]);
289 esc->bsh_phy = rman_get_bushandle(esc->res[2]);
290
291 /* get all DMA memory */
292 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
293 &ehci_iterate_hw_softc))
294 return (ENXIO);
295
296 #if 0
297 printf("USBx_HCSPARAMS is 0x%08x\n",
298 bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS));
299 printf("USB_ID == 0x%08x\n",
300 bus_space_read_4(sc->sc_io_tag, bsh, USB_ID));
301 printf("USB_HWGENERAL == 0x%08x\n",
302 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL));
303 printf("USB_HWHOST == 0x%08x\n",
304 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST));
305 printf("USB_HWDEVICE == 0x%08x\n",
306 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE));
307 printf("USB_HWTXBUF == 0x%08x\n",
308 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF));
309 printf("USB_HWRXBUF == 0x%08x\n",
310 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF));
311 #endif
312
313 if (phy_init(esc)) {
314 device_printf(dev, "Could not setup PHY\n");
315 return (1);
316 }
317
318 /*
319 * Set handle to USB related registers subregion used by
320 * generic EHCI driver.
321 */
322 err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
323 sc->sc_io_size, &sc->sc_io_hdl);
324 if (err != 0)
325 return (ENXIO);
326
327 /* Setup interrupt handler */
328 err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
329 NULL, (driver_intr_t *)ehci_interrupt, sc,
330 &sc->sc_intr_hdl);
331 if (err) {
332 device_printf(dev, "Could not setup irq, "
333 "%d\n", err);
334 return (1);
335 }
336
337 /* Add USB device */
338 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
339 if (!sc->sc_bus.bdev) {
340 device_printf(dev, "Could not add USB device\n");
341 err = bus_teardown_intr(dev, esc->res[5],
342 sc->sc_intr_hdl);
343 if (err)
344 device_printf(dev, "Could not tear down irq,"
345 " %d\n", err);
346 return (1);
347 }
348 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
349
350 strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
351
352 /* Set host mode */
353 reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8);
354 reg |= 0x3;
355 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
356
357 /* Set flags and callbacks*/
358 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
359 sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
360 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
361
362 err = ehci_init(sc);
363 if (!err) {
364 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
365 err = device_probe_and_attach(sc->sc_bus.bdev);
366 } else {
367 device_printf(dev, "USB init failed err=%d\n", err);
368
369 device_delete_child(dev, sc->sc_bus.bdev);
370 sc->sc_bus.bdev = NULL;
371
372 err = bus_teardown_intr(dev, esc->res[5],
373 sc->sc_intr_hdl);
374 if (err)
375 device_printf(dev, "Could not tear down irq,"
376 " %d\n", err);
377 return (1);
378 }
379 return (0);
380 }
381
382 static int
383 vybrid_ehci_detach(device_t dev)
384 {
385 struct vybrid_ehci_softc *esc;
386 ehci_softc_t *sc;
387 int err;
388
389 esc = device_get_softc(dev);
390 sc = &esc->base;
391
392 /* First detach all children; we can't detach if that fails. */
393 if ((err = device_delete_children(dev)) != 0)
394 return (err);
395
396 /*
397 * only call ehci_detach() after ehci_init()
398 */
399 if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
400 ehci_detach(sc);
401 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
402 }
403
404 /*
405 * Disable interrupts that might have been switched on in
406 * ehci_init.
407 */
408 if (sc->sc_io_tag && sc->sc_io_hdl)
409 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl,
410 EHCI_USBINTR, 0);
411
412 if (esc->res[5] && sc->sc_intr_hdl) {
413 err = bus_teardown_intr(dev, esc->res[5],
414 sc->sc_intr_hdl);
415 if (err) {
416 device_printf(dev, "Could not tear down irq,"
417 " %d\n", err);
418 return (err);
419 }
420 sc->sc_intr_hdl = NULL;
421 }
422
423 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
424
425 bus_release_resources(dev, vybrid_ehci_spec, esc->res);
426
427 return (0);
428 }
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