The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/arm/freescale/vybrid/vf_port.c

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Vybrid Family Port control and interrupts (PORT)
   31  * Chapter 6, Vybrid Reference Manual, Rev. 5, 07/2013
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __FBSDID("$FreeBSD: head/sys/arm/freescale/vybrid/vf_port.c 326258 2017-11-27 15:04:10Z pfg $");
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #include <sys/bus.h>
   40 #include <sys/kernel.h>
   41 #include <sys/module.h>
   42 #include <sys/malloc.h>
   43 #include <sys/rman.h>
   44 #include <sys/timeet.h>
   45 #include <sys/timetc.h>
   46 #include <sys/watchdog.h>
   47 
   48 #include <dev/ofw/openfirm.h>
   49 #include <dev/ofw/ofw_bus.h>
   50 #include <dev/ofw/ofw_bus_subr.h>
   51 
   52 #include <machine/bus.h>
   53 #include <machine/cpu.h>
   54 #include <machine/intr.h>
   55 
   56 #include <arm/freescale/vybrid/vf_port.h>
   57 #include <arm/freescale/vybrid/vf_common.h>
   58 
   59 /* Pin Control Register */
   60 #define PORT_PCR(n)             (0x1000 * (n >> 5) + 0x4 * (n % 32))
   61 #define  PCR_IRQC_S     16
   62 #define  PCR_IRQC_M     0xF
   63 #define  PCR_DMA_RE     0x1
   64 #define  PCR_DMA_FE     0x2
   65 #define  PCR_DMA_EE     0x3
   66 #define  PCR_INT_LZ     0x8
   67 #define  PCR_INT_RE     0x9
   68 #define  PCR_INT_FE     0xA
   69 #define  PCR_INT_EE     0xB
   70 #define  PCR_INT_LO     0xC
   71 #define  PCR_ISF        (1 << 24)
   72 #define PORT0_ISFR      0xA0    /* Interrupt Status Flag Register */
   73 #define PORT0_DFER      0xC0    /* Digital Filter Enable Register */
   74 #define PORT0_DFCR      0xC4    /* Digital Filter Clock Register */
   75 #define PORT0_DFWR      0xC8    /* Digital Filter Width Register */
   76 
   77 struct port_event {
   78         uint32_t        enabled;
   79         uint32_t        mux_num;
   80         uint32_t        mux_src;
   81         uint32_t        mux_chn;
   82         void            (*ih) (void *);
   83         void            *ih_user;
   84         enum ev_type    pevt;
   85 };
   86 
   87 static struct port_event event_map[NGPIO];
   88 
   89 struct port_softc {
   90         struct resource         *res[6];
   91         bus_space_tag_t         bst;
   92         bus_space_handle_t      bsh;
   93         void                    *gpio_ih[NGPIO];
   94 };
   95 
   96 struct port_softc *port_sc;
   97 
   98 static struct resource_spec port_spec[] = {
   99         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  100         { SYS_RES_IRQ,          0,      RF_ACTIVE },
  101         { SYS_RES_IRQ,          1,      RF_ACTIVE },
  102         { SYS_RES_IRQ,          2,      RF_ACTIVE },
  103         { SYS_RES_IRQ,          3,      RF_ACTIVE },
  104         { SYS_RES_IRQ,          4,      RF_ACTIVE },
  105         { -1, 0 }
  106 };
  107 
  108 static int
  109 port_intr(void *arg)
  110 {
  111         struct port_event *pev;
  112         struct port_softc *sc;
  113         int reg;
  114         int i;
  115 
  116         sc = arg;
  117 
  118         for (i = 0; i < NGPIO; i++) {
  119                 reg = READ4(sc, PORT_PCR(i));
  120                 if (reg & PCR_ISF) {
  121 
  122                         /* Clear interrupt */
  123                         WRITE4(sc, PORT_PCR(i), reg);
  124 
  125                         /* Handle event */
  126                         pev = &event_map[i];
  127                         if (pev->enabled == 1) {
  128                                 if (pev->ih != NULL) {
  129                                         pev->ih(pev->ih_user);
  130                                 }
  131                         }
  132                 }
  133         }
  134 
  135         return (FILTER_HANDLED);
  136 }
  137 
  138 int
  139 port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user)
  140 {
  141         struct port_event *pev;
  142         struct port_softc *sc;
  143         int reg;
  144         int val;
  145 
  146         sc = port_sc;
  147 
  148         switch (pevt) {
  149         case DMA_RISING_EDGE:
  150                 val = PCR_DMA_RE;
  151                 break;
  152         case DMA_FALLING_EDGE:
  153                 val = PCR_DMA_FE;
  154                 break;
  155         case DMA_EITHER_EDGE:
  156                 val = PCR_DMA_EE;
  157                 break;
  158         case INT_LOGIC_ZERO:
  159                 val = PCR_INT_LZ;
  160                 break;
  161         case INT_RISING_EDGE:
  162                 val = PCR_INT_RE;
  163                 break;
  164         case INT_FALLING_EDGE:
  165                 val = PCR_INT_FE;
  166                 break;
  167         case INT_EITHER_EDGE:
  168                 val = PCR_INT_EE;
  169                 break;
  170         case INT_LOGIC_ONE:
  171                 val = PCR_INT_LO;
  172                 break;
  173         default:
  174                 return (-1);
  175         }
  176 
  177         reg = READ4(sc, PORT_PCR(pnum));
  178         reg &= ~(PCR_IRQC_M << PCR_IRQC_S);
  179         reg |= (val << PCR_IRQC_S);
  180         WRITE4(sc, PORT_PCR(pnum), reg);
  181 
  182         pev = &event_map[pnum];
  183         pev->ih = ih;
  184         pev->ih_user = ih_user;
  185         pev->pevt = pevt;
  186         pev->enabled = 1;
  187 
  188         return (0);
  189 }
  190 
  191 static int
  192 port_probe(device_t dev)
  193 {
  194 
  195         if (!ofw_bus_status_okay(dev))
  196                 return (ENXIO);
  197 
  198         if (!ofw_bus_is_compatible(dev, "fsl,mvf600-port"))
  199                 return (ENXIO);
  200 
  201         device_set_desc(dev, "Vybrid Family Port control and interrupts");
  202         return (BUS_PROBE_DEFAULT);
  203 }
  204 
  205 static int
  206 port_attach(device_t dev)
  207 {
  208         struct port_softc *sc;
  209         int irq;
  210 
  211         sc = device_get_softc(dev);
  212 
  213         if (bus_alloc_resources(dev, port_spec, sc->res)) {
  214                 device_printf(dev, "could not allocate resources\n");
  215                 return (ENXIO);
  216         }
  217 
  218         /* Memory interface */
  219         sc->bst = rman_get_bustag(sc->res[0]);
  220         sc->bsh = rman_get_bushandle(sc->res[0]);
  221 
  222         port_sc = sc;
  223 
  224         for (irq = 0; irq < NPORTS; irq ++) {
  225                 if ((bus_setup_intr(dev, sc->res[1 + irq], INTR_TYPE_MISC,
  226                     port_intr, NULL, sc, &sc->gpio_ih[irq]))) {
  227                         device_printf(dev,
  228                             "ERROR: Unable to register interrupt handler\n");
  229                         return (ENXIO);
  230                 }
  231         }
  232 
  233         return (0);
  234 }
  235 
  236 static device_method_t port_methods[] = {
  237         DEVMETHOD(device_probe,         port_probe),
  238         DEVMETHOD(device_attach,        port_attach),
  239         { 0, 0 }
  240 };
  241 
  242 static driver_t port_driver = {
  243         "port",
  244         port_methods,
  245         sizeof(struct port_softc),
  246 };
  247 
  248 static devclass_t port_devclass;
  249 
  250 DRIVER_MODULE(port, simplebus, port_driver, port_devclass, 0, 0);

Cache object: eb424cc5d009c00a138879955d004477


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.