Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/include/cpuconf.h
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1 /* $NetBSD: cpuconf.h,v 1.8 2003/09/06 08:55:42 rearnsha Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * 37 * $FreeBSD: releng/10.3/sys/arm/include/cpuconf.h 276312 2014-12-27 17:36:49Z ian $ 38 * 39 */ 40 41 #ifndef _MACHINE_CPUCONF_H_ 42 #define _MACHINE_CPUCONF_H_ 43 44 /* 45 * IF YOU CHANGE THIS FILE, MAKE SURE TO UPDATE THE DEFINITION OF 46 * "PMAP_NEEDS_PTE_SYNC" IN <arm/arm32/pmap.h> FOR THE CPU TYPE 47 * YOU ARE ADDING SUPPORT FOR. 48 */ 49 50 /* 51 * Step 1: Count the number of CPU types configured into the kernel. 52 */ 53 #define CPU_NTYPES (defined(CPU_ARM9) + \ 54 defined(CPU_ARM9E) + \ 55 defined(CPU_ARM10) + \ 56 defined(CPU_ARM1136) + \ 57 defined(CPU_ARM1176) + \ 58 defined(CPU_XSCALE_80200) + \ 59 defined(CPU_XSCALE_80321) + \ 60 defined(CPU_XSCALE_PXA2X0) + \ 61 defined(CPU_FA526) + \ 62 defined(CPU_FA626TE) + \ 63 defined(CPU_XSCALE_IXP425)) + \ 64 defined(CPU_CORTEXA) + \ 65 defined(CPU_KRAIT) + \ 66 defined(CPU_MV_PJ4B) 67 68 /* 69 * Step 2: Determine which ARM architecture versions are configured. 70 */ 71 #if defined(CPU_ARM9) || defined(CPU_FA526) 72 #define ARM_ARCH_4 1 73 #else 74 #define ARM_ARCH_4 0 75 #endif 76 77 #if (defined(CPU_ARM9E) || defined(CPU_ARM10) || \ 78 defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 79 defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ 80 defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ 81 defined(CPU_FA626TE)) 82 #define ARM_ARCH_5 1 83 #else 84 #define ARM_ARCH_5 0 85 #endif 86 87 #if !defined(ARM_ARCH_6) 88 #if defined(CPU_ARM1136) || defined(CPU_ARM1176) 89 #define ARM_ARCH_6 1 90 #else 91 #define ARM_ARCH_6 0 92 #endif 93 #endif 94 95 #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B) 96 #define ARM_ARCH_7A 1 97 #else 98 #define ARM_ARCH_7A 0 99 #endif 100 101 #define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 | ARM_ARCH_7A) 102 103 /* 104 * Compatibility for userland builds that have no CPUTYPE defined. Use the ARCH 105 * constants predefined by the compiler to define our old-school arch constants. 106 * This is a stopgap measure to tide us over until the conversion of all code 107 * to the newer ACLE constants defined by ARM (see acle-compat.h). 108 */ 109 #if ARM_NARCH == 0 110 #if defined(__ARM_ARCH_4T__) 111 #undef ARM_ARCH_4 112 #undef ARM_NARCH 113 #define ARM_ARCH_4 1 114 #define ARM_NARCH 1 115 #define CPU_ARM9 1 116 #elif defined(__ARM_ARCH_6ZK__) 117 #undef ARM_ARCH_6 118 #undef ARM_NARCH 119 #define ARM_ARCH_6 1 120 #define ARM_NARCH 1 121 #define CPU_ARM1176 1 122 #endif 123 #endif 124 125 #if ARM_NARCH == 0 && !defined(KLD_MODULE) && defined(_KERNEL) 126 #error ARM_NARCH is 0 127 #endif 128 129 #if ARM_ARCH_5 || ARM_ARCH_6 || ARM_ARCH_7A 130 /* 131 * We could support Thumb code on v4T, but the lack of clean interworking 132 * makes that hard. 133 */ 134 #define THUMB_CODE 135 #endif 136 137 /* 138 * Step 3: Define which MMU classes are configured: 139 * 140 * ARM_MMU_MEMC Prehistoric, external memory controller 141 * and MMU for ARMv2 CPUs. 142 * 143 * ARM_MMU_GENERIC Generic ARM MMU, compatible with ARMv4 and v5. 144 * 145 * ARM_MMU_V6 ARMv6 MMU. 146 * 147 * ARM_MMU_V7 ARMv7 MMU. 148 * 149 * ARM_MMU_XSCALE XScale MMU. Compatible with generic ARM 150 * MMU, but also has several extensions which 151 * require different PTE layout to use. 152 */ 153 #if (defined(CPU_ARM9) || defined(CPU_ARM9E) || \ 154 defined(CPU_ARM10) || defined(CPU_FA526) || \ 155 defined(CPU_FA626TE)) 156 #define ARM_MMU_GENERIC 1 157 #else 158 #define ARM_MMU_GENERIC 0 159 #endif 160 161 #if defined(CPU_ARM1136) || defined(CPU_ARM1176) 162 #define ARM_MMU_V6 1 163 #else 164 #define ARM_MMU_V6 0 165 #endif 166 167 #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B) 168 #define ARM_MMU_V7 1 169 #else 170 #define ARM_MMU_V7 0 171 #endif 172 173 #if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 174 defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ 175 defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)) 176 #define ARM_MMU_XSCALE 1 177 #else 178 #define ARM_MMU_XSCALE 0 179 #endif 180 181 #define ARM_NMMUS (ARM_MMU_GENERIC + ARM_MMU_V6 + \ 182 ARM_MMU_V7 + ARM_MMU_XSCALE) 183 #if ARM_NMMUS == 0 && !defined(KLD_MODULE) && defined(_KERNEL) 184 #error ARM_NMMUS is 0 185 #endif 186 187 /* 188 * Step 4: Define features that may be present on a subset of CPUs 189 * 190 * ARM_XSCALE_PMU Performance Monitoring Unit on 80200 and 80321 191 */ 192 193 #if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 194 defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)) 195 #define ARM_XSCALE_PMU 1 196 #else 197 #define ARM_XSCALE_PMU 0 198 #endif 199 200 #if defined(CPU_XSCALE_81342) 201 #define CPU_XSCALE_CORE3 202 #endif 203 #endif /* _MACHINE_CPUCONF_H_ */
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