1 /* $NetBSD: cpuconf.h,v 1.8 2003/09/06 08:55:42 rearnsha Exp $ */
2
3 /*-
4 * Copyright (c) 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 * $FreeBSD: releng/11.0/sys/arm/include/cpuconf.h 295200 2016-02-03 09:15:44Z mmel $
38 *
39 */
40
41 #ifndef _MACHINE_CPUCONF_H_
42 #define _MACHINE_CPUCONF_H_
43
44 /*
45 * IF YOU CHANGE THIS FILE, MAKE SURE TO UPDATE THE DEFINITION OF
46 * "PMAP_NEEDS_PTE_SYNC" IN <arm/arm32/pmap.h> FOR THE CPU TYPE
47 * YOU ARE ADDING SUPPORT FOR.
48 */
49
50 /*
51 * Step 1: Count the number of CPU types configured into the kernel.
52 */
53 #define CPU_NTYPES (defined(CPU_ARM9) + \
54 defined(CPU_ARM9E) + \
55 defined(CPU_ARM1176) + \
56 defined(CPU_XSCALE_PXA2X0) + \
57 defined(CPU_FA526) + \
58 defined(CPU_XSCALE_IXP425)) + \
59 defined(CPU_CORTEXA) + \
60 defined(CPU_KRAIT) + \
61 defined(CPU_MV_PJ4B)
62
63 /*
64 * Step 2: Determine which ARM architecture versions are configured.
65 */
66 #if defined(CPU_ARM9) || defined(CPU_FA526)
67 #define ARM_ARCH_4 1
68 #else
69 #define ARM_ARCH_4 0
70 #endif
71
72 #if (defined(CPU_ARM9E) || \
73 defined(CPU_XSCALE_81342) || \
74 defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425))
75 #define ARM_ARCH_5 1
76 #else
77 #define ARM_ARCH_5 0
78 #endif
79
80 #if !defined(ARM_ARCH_6)
81 #if defined(CPU_ARM1176)
82 #define ARM_ARCH_6 1
83 #else
84 #define ARM_ARCH_6 0
85 #endif
86 #endif
87
88 #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
89 #define ARM_ARCH_7A 1
90 #else
91 #define ARM_ARCH_7A 0
92 #endif
93
94 #define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 | ARM_ARCH_7A)
95
96 /*
97 * Compatibility for userland builds that have no CPUTYPE defined. Use the ARCH
98 * constants predefined by the compiler to define our old-school arch constants.
99 * This is a stopgap measure to tide us over until the conversion of all code
100 * to the newer ACLE constants defined by ARM (see acle-compat.h).
101 */
102 #if ARM_NARCH == 0
103 #if defined(__ARM_ARCH_4T__)
104 #undef ARM_ARCH_4
105 #undef ARM_NARCH
106 #define ARM_ARCH_4 1
107 #define ARM_NARCH 1
108 #define CPU_ARM9 1
109 #elif defined(__ARM_ARCH_6ZK__)
110 #undef ARM_ARCH_6
111 #undef ARM_NARCH
112 #define ARM_ARCH_6 1
113 #define ARM_NARCH 1
114 #define CPU_ARM1176 1
115 #endif
116 #endif
117
118 #if ARM_NARCH == 0 && !defined(KLD_MODULE) && defined(_KERNEL)
119 #error ARM_NARCH is 0
120 #endif
121
122 #if ARM_ARCH_5 || ARM_ARCH_6 || ARM_ARCH_7A
123 /*
124 * We could support Thumb code on v4T, but the lack of clean interworking
125 * makes that hard.
126 */
127 #define THUMB_CODE
128 #endif
129
130 /*
131 * Step 3: Define which MMU classes are configured:
132 *
133 * ARM_MMU_MEMC Prehistoric, external memory controller
134 * and MMU for ARMv2 CPUs.
135 *
136 * ARM_MMU_GENERIC Generic ARM MMU, compatible with ARMv4 and v5.
137 *
138 * ARM_MMU_V6 ARMv6 MMU.
139 *
140 * ARM_MMU_V7 ARMv7 MMU.
141 *
142 * ARM_MMU_XSCALE XScale MMU. Compatible with generic ARM
143 * MMU, but also has several extensions which
144 * require different PTE layout to use.
145 */
146 #if (defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_FA526))
147 #define ARM_MMU_GENERIC 1
148 #else
149 #define ARM_MMU_GENERIC 0
150 #endif
151
152 #if defined(CPU_ARM1176)
153 #define ARM_MMU_V6 1
154 #else
155 #define ARM_MMU_V6 0
156 #endif
157
158 #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) || defined(CPU_MV_PJ4B)
159 #define ARM_MMU_V7 1
160 #else
161 #define ARM_MMU_V7 0
162 #endif
163
164 #if (defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
165 defined(CPU_XSCALE_81342))
166 #define ARM_MMU_XSCALE 1
167 #else
168 #define ARM_MMU_XSCALE 0
169 #endif
170
171 #define ARM_NMMUS (ARM_MMU_GENERIC + ARM_MMU_V6 + \
172 ARM_MMU_V7 + ARM_MMU_XSCALE)
173 #if ARM_NMMUS == 0 && !defined(KLD_MODULE) && defined(_KERNEL)
174 #error ARM_NMMUS is 0
175 #endif
176
177 /*
178 * Step 4: Define features that may be present on a subset of CPUs
179 *
180 * ARM_XSCALE_PMU Performance Monitoring Unit on 81342
181 */
182
183 #if (defined(CPU_XSCALE_81342))
184 #define ARM_XSCALE_PMU 1
185 #else
186 #define ARM_XSCALE_PMU 0
187 #endif
188
189 #if defined(CPU_XSCALE_81342)
190 #define CPU_XSCALE_CORE3
191 #endif
192 #endif /* _MACHINE_CPUCONF_H_ */
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