cpuinfo.h

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 /*-
    2  * Copyright 2014 Svatopluk Kraus <onwahe@gmail.com>
    3  * Copyright 2014 Michal Meloun <meloun@miracle.cz>
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD: releng/11.0/sys/arm/include/cpuinfo.h 289602 2015-10-19 19:18:02Z ian $
   28  */
   29 
   30 #ifndef _MACHINE_CPUINFO_H_
   31 #define _MACHINE_CPUINFO_H_
   32 
   33 #include <sys/types.h>
   34 
   35 #define CPU_IMPLEMENTER_ARM             0x41
   36 #define CPU_IMPLEMENTER_QCOM            0x51
   37 #define CPU_IMPLEMENTER_MRVL            0x56
   38 
   39 /* ARM */
   40 #define CPU_ARCH_ARM1176                0xB76
   41 #define CPU_ARCH_CORTEX_A5              0xC05
   42 #define CPU_ARCH_CORTEX_A7              0xC07
   43 #define CPU_ARCH_CORTEX_A8              0xC08
   44 #define CPU_ARCH_CORTEX_A9              0xC09
   45 #define CPU_ARCH_CORTEX_A12             0xC0D
   46 #define CPU_ARCH_CORTEX_A15             0xC0F
   47 #define CPU_ARCH_CORTEX_A17             0xC11
   48 
   49 /* QCOM */
   50 #define CPU_ARCH_KRAIT_300              0x06F
   51 
   52 struct cpuinfo {
   53         /* raw id registers */
   54         uint32_t midr;
   55         uint32_t ctr;
   56         uint32_t tcmtr;
   57         uint32_t tlbtr;
   58         uint32_t mpidr;
   59         uint32_t revidr;
   60         uint32_t id_pfr0;
   61         uint32_t id_pfr1;
   62         uint32_t id_dfr0;
   63         uint32_t id_afr0;
   64         uint32_t id_mmfr0;
   65         uint32_t id_mmfr1;
   66         uint32_t id_mmfr2;
   67         uint32_t id_mmfr3;
   68         uint32_t id_isar0;
   69         uint32_t id_isar1;
   70         uint32_t id_isar2;
   71         uint32_t id_isar3;
   72         uint32_t id_isar4;
   73         uint32_t id_isar5;
   74         uint32_t cbar;
   75 
   76         /* Parsed bits of above registers... */
   77 
   78         /* midr */
   79         int implementer;
   80         int revision;
   81         int architecture;
   82         int part_number;
   83         int patch;
   84 
   85         /* id_mmfr0 */
   86         int outermost_shareability;
   87         int shareability_levels;
   88         int auxiliary_registers;
   89         int innermost_shareability;
   90 
   91         /* id_mmfr1 */
   92         int mem_barrier;
   93 
   94         /* id_mmfr3 */
   95         int coherent_walk;
   96         int maintenance_broadcast;
   97 
   98         /* id_pfr1 */
   99         int generic_timer_ext;
  100         int virtualization_ext;
  101         int security_ext;
  102 
  103         /* L1 cache info */
  104         int dcache_line_size;
  105         int dcache_line_mask;
  106         int icache_line_size;
  107         int icache_line_mask;
  108 };
  109 
  110 extern struct cpuinfo cpuinfo;
  111 
  112 void cpuinfo_init(void);
  113 void cpuinfo_get_actlr_modifier(uint32_t *actlr_mask, uint32_t *actlr_set);
  114 #endif  /* _MACHINE_CPUINFO_H_ */

Cache object: 6dac35f2ec5e55e0b87cb55b80e5c661

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/arm/include/cpuinfo.h

FreeBSD/Linux Kernel Cross Reference
sys/arm/include/cpuinfo.h