The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/lpc/lpc_spi.c

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    1 /*-
    2  * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  */
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/10.0/sys/arm/lpc/lpc_spi.c 239278 2012-08-15 05:37:10Z gonzo $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bio.h>
   33 #include <sys/bus.h>
   34 #include <sys/conf.h>
   35 #include <sys/endian.h>
   36 #include <sys/kernel.h>
   37 #include <sys/kthread.h>
   38 #include <sys/lock.h>
   39 #include <sys/malloc.h>
   40 #include <sys/module.h>
   41 #include <sys/mutex.h>
   42 #include <sys/queue.h>
   43 #include <sys/resource.h>
   44 #include <sys/rman.h>
   45 #include <sys/time.h>
   46 #include <sys/timetc.h>
   47 #include <sys/watchdog.h>
   48 
   49 #include <machine/bus.h>
   50 #include <machine/cpu.h>
   51 #include <machine/cpufunc.h>
   52 #include <machine/resource.h>
   53 #include <machine/frame.h>
   54 #include <machine/intr.h>
   55 
   56 #include <dev/spibus/spi.h>
   57 #include <dev/spibus/spibusvar.h>
   58 
   59 #include <dev/ofw/ofw_bus.h>
   60 #include <dev/ofw/ofw_bus_subr.h>
   61 
   62 #include <arm/lpc/lpcreg.h>
   63 #include <arm/lpc/lpcvar.h>
   64 
   65 #include "spibus_if.h"
   66 
   67 struct lpc_spi_softc
   68 {
   69         device_t                ls_dev;
   70         struct resource *       ls_mem_res;
   71         struct resource *       ls_irq_res;
   72         bus_space_tag_t         ls_bst;
   73         bus_space_handle_t      ls_bsh;
   74 };
   75 
   76 static int lpc_spi_probe(device_t);
   77 static int lpc_spi_attach(device_t);
   78 static int lpc_spi_detach(device_t);
   79 static int lpc_spi_transfer(device_t, device_t, struct spi_command *);
   80 
   81 #define lpc_spi_read_4(_sc, _reg)               \
   82     bus_space_read_4(_sc->ls_bst, _sc->ls_bsh, _reg)
   83 #define lpc_spi_write_4(_sc, _reg, _val)        \
   84     bus_space_write_4(_sc->ls_bst, _sc->ls_bsh, _reg, _val)
   85 
   86 static int
   87 lpc_spi_probe(device_t dev)
   88 {
   89         if (!ofw_bus_is_compatible(dev, "lpc,spi"))
   90                 return (ENXIO);
   91 
   92         device_set_desc(dev, "LPC32x0 PL022 SPI/SSP controller");
   93         return (BUS_PROBE_DEFAULT);
   94 }
   95 
   96 static int
   97 lpc_spi_attach(device_t dev)
   98 {
   99         struct lpc_spi_softc *sc = device_get_softc(dev);
  100         int rid;
  101 
  102         sc->ls_dev = dev;
  103 
  104         rid = 0;
  105         sc->ls_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  106             RF_ACTIVE);
  107         if (!sc->ls_mem_res) {
  108                 device_printf(dev, "cannot allocate memory window\n");
  109                 return (ENXIO);
  110         }
  111 
  112         sc->ls_bst = rman_get_bustag(sc->ls_mem_res);
  113         sc->ls_bsh = rman_get_bushandle(sc->ls_mem_res);
  114 
  115         rid = 0;
  116         sc->ls_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  117             RF_ACTIVE);
  118         if (!sc->ls_irq_res) {
  119                 device_printf(dev, "cannot allocate interrupt\n");
  120                 return (ENXIO);
  121         }
  122 
  123         bus_space_write_4(sc->ls_bst, 0xd0028100, 0, (1<<12)|(1<<10)|(1<<9)|(1<<8)|(1<<6)|(1<<5)); 
  124         lpc_pwr_write(dev, LPC_CLKPWR_SSP_CTRL, LPC_CLKPWR_SSP_CTRL_SSP0EN);
  125         lpc_spi_write_4(sc, LPC_SSP_CR0, LPC_SSP_CR0_DSS(8));
  126         lpc_spi_write_4(sc, LPC_SSP_CR1, LPC_SSP_CR1_SSE);
  127         lpc_spi_write_4(sc, LPC_SSP_CPSR, 128);
  128 
  129         device_add_child(dev, "spibus", 0);
  130         return (bus_generic_attach(dev));
  131 }
  132 
  133 static int
  134 lpc_spi_detach(device_t dev)
  135 {
  136         return (EBUSY);
  137 }
  138 
  139 static int
  140 lpc_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
  141 {
  142         struct lpc_spi_softc *sc = device_get_softc(dev);
  143         struct spibus_ivar *devi = SPIBUS_IVAR(child);
  144         uint8_t *in_buf, *out_buf;
  145         int i;
  146 
  147         /* Set CS active */
  148         lpc_gpio_set_state(child, devi->cs, 0);
  149 
  150         /* Wait for FIFO to be ready */
  151         while ((lpc_spi_read_4(sc, LPC_SSP_SR) & LPC_SSP_SR_TNF) == 0);
  152 
  153         /* Command */
  154         in_buf = cmd->rx_cmd;
  155         out_buf = cmd->tx_cmd;
  156         for (i = 0; i < cmd->tx_cmd_sz; i++) {
  157                 lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
  158                 in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
  159         }
  160 
  161         /* Data */
  162         in_buf = cmd->rx_data;
  163         out_buf = cmd->tx_data;
  164         for (i = 0; i < cmd->tx_data_sz; i++) {
  165                 lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
  166                 in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
  167         }
  168 
  169         /* Set CS inactive */
  170         lpc_gpio_set_state(child, devi->cs, 1);
  171 
  172         return (0);
  173 }
  174 
  175 static device_method_t lpc_spi_methods[] = {
  176         /* Device interface */
  177         DEVMETHOD(device_probe,         lpc_spi_probe),
  178         DEVMETHOD(device_attach,        lpc_spi_attach),
  179         DEVMETHOD(device_detach,        lpc_spi_detach),
  180 
  181         /* SPI interface */
  182         DEVMETHOD(spibus_transfer,      lpc_spi_transfer),
  183 
  184         { 0, 0 }
  185 };
  186 
  187 static devclass_t lpc_spi_devclass;
  188 
  189 static driver_t lpc_spi_driver = {
  190         "spi",
  191         lpc_spi_methods,
  192         sizeof(struct lpc_spi_softc),
  193 };
  194 
  195 DRIVER_MODULE(lpcspi, simplebus, lpc_spi_driver, lpc_spi_devclass, 0, 0);

Cache object: de3586a2d7c7028322878b381a11454e


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