The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/lpc/lpc_timer.c

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    1 /*-
    2  * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  */
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/10.2/sys/arm/lpc/lpc_timer.c 266207 2014-05-16 02:21:51Z ian $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 #include <sys/malloc.h>
   36 #include <sys/rman.h>
   37 #include <sys/timetc.h>
   38 #include <sys/timeet.h>
   39 #include <machine/bus.h>
   40 #include <machine/cpu.h>
   41 #include <machine/intr.h>
   42 
   43 #include <dev/fdt/fdt_common.h>
   44 #include <dev/ofw/ofw_bus.h>
   45 #include <dev/ofw/ofw_bus_subr.h>
   46 
   47 #include <arm/lpc/lpcreg.h>
   48 #include <arm/lpc/lpcvar.h>
   49 
   50 struct lpc_timer_softc {
   51         device_t                lt_dev;
   52         struct eventtimer       lt_et;
   53         struct resource *       lt_res[5];
   54         bus_space_tag_t         lt_bst0;
   55         bus_space_handle_t      lt_bsh0;
   56         bus_space_tag_t         lt_bst1;
   57         bus_space_handle_t      lt_bsh1;
   58         int                     lt_oneshot;
   59         uint32_t                lt_period;
   60 };
   61 
   62 static struct resource_spec lpc_timer_spec[] = {
   63         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   64         { SYS_RES_MEMORY,       1,      RF_ACTIVE },
   65         { SYS_RES_IRQ,          0,      RF_ACTIVE },
   66         { SYS_RES_IRQ,          1,      RF_ACTIVE },
   67         { -1, 0 }
   68 };
   69 
   70 static struct lpc_timer_softc *timer_softc = NULL;
   71 static int lpc_timer_initialized = 0;
   72 static int lpc_timer_probe(device_t);
   73 static int lpc_timer_attach(device_t);
   74 static int lpc_timer_start(struct eventtimer *,
   75     sbintime_t first, sbintime_t period);
   76 static int lpc_timer_stop(struct eventtimer *et);
   77 static unsigned lpc_get_timecount(struct timecounter *);
   78 static int lpc_hardclock(void *);
   79 
   80 #define timer0_read_4(sc, reg)                  \
   81     bus_space_read_4(sc->lt_bst0, sc->lt_bsh0, reg)
   82 #define timer0_write_4(sc, reg, val)            \
   83     bus_space_write_4(sc->lt_bst0, sc->lt_bsh0, reg, val)
   84 #define timer0_clear(sc)                        \
   85     do {                                        \
   86             timer0_write_4(sc, LPC_TIMER_TC, 0);        \
   87             timer0_write_4(sc, LPC_TIMER_PR, 0);        \
   88             timer0_write_4(sc, LPC_TIMER_PC, 0);        \
   89     } while(0)
   90 
   91 #define timer1_read_4(sc, reg)                  \
   92     bus_space_read_4(sc->lt_bst1, sc->lt_bsh1, reg)
   93 #define timer1_write_4(sc, reg, val)            \
   94     bus_space_write_4(sc->lt_bst1, sc->lt_bsh1, reg, val)
   95 #define timer1_clear(sc)                        \
   96     do {                                        \
   97             timer1_write_4(sc, LPC_TIMER_TC, 0);        \
   98             timer1_write_4(sc, LPC_TIMER_PR, 0);        \
   99             timer1_write_4(sc, LPC_TIMER_PC, 0);        \
  100     } while(0)
  101 
  102 static struct timecounter lpc_timecounter = {
  103         .tc_get_timecount = lpc_get_timecount,
  104         .tc_name = "LPC32x0 Timer1",
  105         .tc_frequency = 0, /* will be filled later */
  106         .tc_counter_mask = ~0u,
  107         .tc_quality = 1000,
  108 };
  109 
  110 static int
  111 lpc_timer_probe(device_t dev)
  112 {
  113 
  114         if (!ofw_bus_status_okay(dev))
  115                 return (ENXIO);
  116 
  117         if (!ofw_bus_is_compatible(dev, "lpc,timer"))
  118                 return (ENXIO);
  119 
  120         device_set_desc(dev, "LPC32x0 timer");
  121         return (BUS_PROBE_DEFAULT);
  122 }
  123 
  124 static int
  125 lpc_timer_attach(device_t dev)
  126 {
  127         void *intrcookie;
  128         struct lpc_timer_softc *sc = device_get_softc(dev);
  129         phandle_t node;
  130         uint32_t freq;
  131 
  132         if (timer_softc)
  133                 return (ENXIO);
  134 
  135         timer_softc = sc;
  136 
  137         if (bus_alloc_resources(dev, lpc_timer_spec, sc->lt_res)) {
  138                 device_printf(dev, "could not allocate resources\n");
  139                 return (ENXIO);
  140         }
  141 
  142         sc->lt_bst0 = rman_get_bustag(sc->lt_res[0]);
  143         sc->lt_bsh0 = rman_get_bushandle(sc->lt_res[0]);
  144         sc->lt_bst1 = rman_get_bustag(sc->lt_res[1]);
  145         sc->lt_bsh1 = rman_get_bushandle(sc->lt_res[1]);
  146 
  147         if (bus_setup_intr(dev, sc->lt_res[2], INTR_TYPE_CLK,
  148             lpc_hardclock, NULL, sc, &intrcookie)) {
  149                 device_printf(dev, "could not setup interrupt handler\n");
  150                 bus_release_resources(dev, lpc_timer_spec, sc->lt_res);
  151                 return (ENXIO);
  152         }
  153 
  154         /* Enable timer clock */
  155         lpc_pwr_write(dev, LPC_CLKPWR_TIMCLK_CTRL1,
  156             LPC_CLKPWR_TIMCLK_CTRL1_TIMER0 |
  157             LPC_CLKPWR_TIMCLK_CTRL1_TIMER1);
  158 
  159         /* Get PERIPH_CLK encoded in parent bus 'bus-frequency' property */
  160         node = ofw_bus_get_node(dev);
  161         if (OF_getprop(OF_parent(node), "bus-frequency", &freq,
  162             sizeof(pcell_t)) <= 0) {
  163                 bus_release_resources(dev, lpc_timer_spec, sc->lt_res);
  164                 bus_teardown_intr(dev, sc->lt_res[2], intrcookie);
  165                 device_printf(dev, "could not obtain base clock frequency\n");
  166                 return (ENXIO);
  167         }
  168 
  169         freq = fdt32_to_cpu(freq);
  170 
  171         /* Set desired frequency in event timer and timecounter */
  172         sc->lt_et.et_frequency = (uint64_t)freq;
  173         lpc_timecounter.tc_frequency = (uint64_t)freq;  
  174 
  175         sc->lt_et.et_name = "LPC32x0 Timer0";
  176         sc->lt_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
  177         sc->lt_et.et_quality = 1000;
  178         sc->lt_et.et_min_period = (0x00000002LLU << 32) / sc->lt_et.et_frequency;
  179         sc->lt_et.et_max_period = (0xfffffffeLLU << 32) / sc->lt_et.et_frequency;
  180         sc->lt_et.et_start = lpc_timer_start;
  181         sc->lt_et.et_stop = lpc_timer_stop;
  182         sc->lt_et.et_priv = sc;
  183 
  184         et_register(&sc->lt_et);
  185         tc_init(&lpc_timecounter);
  186 
  187         /* Reset and enable timecounter */
  188         timer1_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_RESET);
  189         timer1_write_4(sc, LPC_TIMER_TCR, 0);
  190         timer1_clear(sc);
  191         timer1_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
  192 
  193         /* DELAY() now can work properly */
  194         lpc_timer_initialized = 1;
  195 
  196         return (0);
  197 }
  198 
  199 static int
  200 lpc_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
  201 {
  202         struct lpc_timer_softc *sc = (struct lpc_timer_softc *)et->et_priv;
  203         uint32_t ticks;
  204 
  205         if (period == 0) {
  206                 sc->lt_oneshot = 1;
  207                 sc->lt_period = 0;
  208         } else {
  209                 sc->lt_oneshot = 0;
  210                 sc->lt_period = ((uint32_t)et->et_frequency * period) >> 32;
  211         }
  212 
  213         if (first == 0)
  214                 ticks = sc->lt_period;
  215         else
  216                 ticks = ((uint32_t)et->et_frequency * first) >> 32;
  217 
  218         /* Reset timer */
  219         timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_RESET);
  220         timer0_write_4(sc, LPC_TIMER_TCR, 0);
  221         
  222         /* Start timer */
  223         timer0_clear(sc);
  224         timer0_write_4(sc, LPC_TIMER_MR0, ticks);
  225         timer0_write_4(sc, LPC_TIMER_MCR, LPC_TIMER_MCR_MR0I | LPC_TIMER_MCR_MR0S);
  226         timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
  227         return (0);
  228 }
  229 
  230 static int
  231 lpc_timer_stop(struct eventtimer *et)
  232 {
  233         struct lpc_timer_softc *sc = (struct lpc_timer_softc *)et->et_priv;
  234 
  235         timer0_write_4(sc, LPC_TIMER_TCR, 0);
  236         return (0);
  237 }
  238 
  239 static device_method_t lpc_timer_methods[] = {
  240         DEVMETHOD(device_probe,         lpc_timer_probe),
  241         DEVMETHOD(device_attach,        lpc_timer_attach),
  242         { 0, 0 }
  243 };
  244 
  245 static driver_t lpc_timer_driver = {
  246         "timer",
  247         lpc_timer_methods,
  248         sizeof(struct lpc_timer_softc),
  249 };
  250 
  251 static devclass_t lpc_timer_devclass;
  252 
  253 DRIVER_MODULE(timer, simplebus, lpc_timer_driver, lpc_timer_devclass, 0, 0);
  254 
  255 static int
  256 lpc_hardclock(void *arg)
  257 {
  258         struct lpc_timer_softc *sc = (struct lpc_timer_softc *)arg;
  259 
  260         /* Reset pending interrupt */
  261         timer0_write_4(sc, LPC_TIMER_IR, 0xffffffff);
  262 
  263         /* Start timer again */
  264         if (!sc->lt_oneshot) {
  265                 timer0_clear(sc);
  266                 timer0_write_4(sc, LPC_TIMER_MR0, sc->lt_period);
  267                 timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
  268         }
  269 
  270         if (sc->lt_et.et_active)
  271                 sc->lt_et.et_event_cb(&sc->lt_et, sc->lt_et.et_arg);
  272 
  273         return (FILTER_HANDLED);
  274 }
  275 
  276 static unsigned
  277 lpc_get_timecount(struct timecounter *tc)
  278 {
  279         return timer1_read_4(timer_softc, LPC_TIMER_TC);
  280 }
  281 
  282 void
  283 DELAY(int usec)
  284 {
  285         uint32_t counter;
  286         uint32_t first, last;
  287         int val = (lpc_timecounter.tc_frequency / 1000000 + 1) * usec;
  288 
  289         /* Timer is not initialized yet */
  290         if (!lpc_timer_initialized) {
  291                 for (; usec > 0; usec--)
  292                         for (counter = 100; counter > 0; counter--)
  293                                 ;
  294                 return;
  295         }
  296 
  297         first = lpc_get_timecount(&lpc_timecounter);
  298         while (val > 0) {
  299                 last = lpc_get_timecount(&lpc_timecounter);
  300                 if (last < first) {
  301                         /* Timer rolled over */
  302                         last = first;
  303                 }
  304                 
  305                 val -= (last - first);
  306                 first = last;
  307         }
  308 }

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