1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2018, 2019 Rubicon Communications, LLC (Netgate)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30 #ifndef _A37X0_IICREG_H_
31 #define _A37X0_IICREG_H_
32
33 #define A37X0_IIC_IBMR 0x00
34 #define A37X0_IIC_IDBR 0x04
35 #define A37X0_IIC_ICR 0x08
36 #define ICR_START (1 << 0)
37 #define ICR_STOP (1 << 1)
38 #define ICR_ACKNAK (1 << 2)
39 #define ICR_TB (1 << 3)
40 #define ICR_MA (1 << 4)
41 #define ICR_SCLE (1 << 5)
42 #define ICR_IUE (1 << 6)
43 #define ICR_GCD (1 << 7)
44 #define ICR_ITEIE (1 << 8)
45 #define ICR_IRFIE (1 << 9)
46 #define ICR_BEIE (1 << 10)
47 #define ICR_SSDIE (1 << 11)
48 #define ICR_ALDIE (1 << 12)
49 #define ICR_SADIE (1 << 13)
50 #define ICR_UR (1 << 14)
51 #define ICR_FAST_MODE (1 << 16)
52 #define ICR_HIGH_SPEED (1 << 17)
53 #define ICR_MODE_MASK (ICR_FAST_MODE | ICR_HIGH_SPEED)
54 #define ICR_INIT \
55 (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
56 #define A37X0_IIC_ISR 0x0c
57 #define ISR_RWM (1 << 0)
58 #define ISR_ACKNAK (1 << 1)
59 #define ISR_UB (1 << 2)
60 #define ISR_IBB (1 << 3)
61 #define ISR_SSD (1 << 4)
62 #define ISR_ALD (1 << 5)
63 #define ISR_ITE (1 << 6)
64 #define ISR_IRF (1 << 7)
65 #define ISR_GCAD (1 << 8)
66 #define ISR_SAD (1 << 9)
67 #define ISR_BED (1 << 10)
68
69 #endif /* _A37X0_IICREG_H_ */
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