The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/armadaxp/mptramp.S

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    1 /*-
    2  * Copyright 2011 Semihalf
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <machine/asm.h>
   28 #include <machine/armreg.h>
   29 
   30 __FBSDID("$FreeBSD: releng/10.1/sys/arm/mv/armadaxp/mptramp.S 266385 2014-05-18 00:30:04Z ian $");
   31 
   32 ASENTRY_NP(mptramp)
   33         mov     r0, #0
   34         mcr     p15, 0, r0, c7, c7, 0
   35 
   36         mrs     r3, cpsr
   37         bic     r3, r3, #(PSR_MODE)
   38         orr     r3, r3, #(PSR_SVC32_MODE)
   39         msr     cpsr_fsxc, r3
   40 
   41         mrc     p15, 0, r0, c0, c0, 5
   42         and     r0, #0x0f               /* Get CPU ID */
   43 
   44         /* Read boot address for CPU */
   45         mov     r1, #0x100
   46         mul     r2, r0, r1
   47         ldr     r1, Lpmureg
   48         add     r0, r2, r1
   49         ldr     r1, [r0], #0x00
   50 
   51         mov pc, r1
   52 
   53 Lpmureg:
   54         .word   0xd0022124
   55 END(mptramp)
   56 

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