1 /*-
2 * Copyright 2011 Semihalf
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <machine/asm.h>
28 #include <machine/armreg.h>
29
30 __FBSDID("$FreeBSD$");
31
32 .global _C_LABEL(mptramp_pmu_boot)
33
34 ASENTRY_NP(mptramp)
35 mov r0, #0
36 mcr p15, 0, r0, c7, c7, 0
37
38 mrs r3, cpsr
39 bic r3, r3, #(PSR_MODE)
40 orr r3, r3, #(PSR_SVC32_MODE)
41 msr cpsr_fsxc, r3
42
43 mrc p15, 0, r0, c0, c0, 5
44 and r0, #0x0f /* Get CPU ID */
45
46 /* Read boot address for CPU */
47 mov r1, #0x100
48 mul r2, r0, r1
49 ldr r1, mptramp_pmu_boot
50 add r0, r2, r1
51 ldr r1, [r0], #0x00
52
53 mov pc, r1
54
55 _C_LABEL(mptramp_pmu_boot):
56 .word 0x0
57
58 END(mptramp)
59
60 .global _C_LABEL(mptramp_end)
61 _C_LABEL(mptramp_end):
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