The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/clk/a37x0_tbg.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2021 Semihalf.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 #include <sys/rman.h>
   36 #include <machine/bus.h>
   37 
   38 #include <dev/extres/clk/clk.h>
   39 #include <dev/ofw/ofw_bus_subr.h>
   40 
   41 #include "clkdev_if.h"
   42 
   43 #include "a37x0_tbg_pll.h"
   44 
   45 #define NUM_TBG                 4
   46 
   47 #define TBG_CTRL0               0x4
   48 #define TBG_CTRL1               0x8
   49 #define TBG_CTRL7               0x20
   50 #define TBG_CTRL8               0x30
   51 
   52 #define TBG_MASK                0x1FF
   53 
   54 #define TBG_A_REFDIV            0
   55 #define TBG_B_REFDIV            16
   56 
   57 #define TBG_A_FBDIV             2
   58 #define TBG_B_FBDIV             18
   59 
   60 #define TBG_A_VCODIV_SEL        0
   61 #define TBG_B_VCODIV_SEL        16
   62 
   63 #define TBG_A_VCODIV_DIFF       1
   64 #define TBG_B_VCODIV_DIFF       17
   65 
   66 struct a37x0_tbg_softc {
   67         device_t                dev;
   68         struct clkdom           *clkdom;
   69         struct resource         *res;
   70 };
   71 
   72 static struct resource_spec a37x0_tbg_clk_spec[] = {
   73         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   74         { -1, 0 }
   75 };
   76 
   77 struct a37x0_tbg_def {
   78         char                    *name;
   79         uint32_t                refdiv_shift;
   80         uint32_t                fbdiv_shift;
   81         uint32_t                vcodiv_offset;
   82         uint32_t                vcodiv_shift;
   83         uint32_t                tbg_bypass_en;
   84 };
   85 
   86 static const struct a37x0_tbg_def tbg[NUM_TBG] = {
   87         {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF, 9},
   88         {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8,
   89             TBG_B_VCODIV_DIFF, 25},
   90         {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SEL, 9},
   91         {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SEL, 25}
   92 };
   93 
   94 static int a37x0_tbg_read_4(device_t, bus_addr_t, uint32_t *);
   95 static int a37x0_tbg_attach(device_t);
   96 static int a37x0_tbg_detach(device_t);
   97 static int a37x0_tbg_probe(device_t);
   98 
   99 static device_method_t a37x0_tbg_methods [] = {
  100         DEVMETHOD(device_attach,        a37x0_tbg_attach),
  101         DEVMETHOD(device_detach,        a37x0_tbg_detach),
  102         DEVMETHOD(device_probe,         a37x0_tbg_probe),
  103 
  104         DEVMETHOD(clkdev_read_4,        a37x0_tbg_read_4),
  105 
  106         DEVMETHOD_END
  107 };
  108 
  109 static driver_t a37x0_tbg_driver = {
  110         "a37x0_tbg",
  111         a37x0_tbg_methods,
  112         sizeof(struct a37x0_tbg_softc)
  113 };
  114 
  115 EARLY_DRIVER_MODULE(a37x0_tbg, simplebus, a37x0_tbg_driver, 0, 0,
  116     BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
  117 
  118 static int
  119 a37x0_tbg_read_4(device_t dev, bus_addr_t offset, uint32_t *val)
  120 {
  121         struct a37x0_tbg_softc *sc;
  122 
  123         sc = device_get_softc(dev);
  124 
  125         *val = bus_read_4(sc->res, offset);
  126 
  127         return (0);
  128 }
  129 
  130 static int
  131 a37x0_tbg_attach(device_t dev)
  132 {
  133         struct a37x0_tbg_pll_clk_def def;
  134         struct a37x0_tbg_softc *sc;
  135         const char *clkname;
  136         int error, i;
  137         phandle_t node;
  138         clk_t clock;
  139 
  140         sc = device_get_softc(dev);
  141         node = ofw_bus_get_node(dev);
  142         sc->dev = dev;
  143 
  144         if (bus_alloc_resources(dev, a37x0_tbg_clk_spec, &sc->res) != 0) {
  145                 device_printf(dev, "Cannot allocate resources\n");
  146                 return (ENXIO);
  147         }
  148 
  149         sc->clkdom = clkdom_create(dev);
  150         if (sc->clkdom == NULL) {
  151                 device_printf(dev, "Cannot create clock domain.\n");
  152                 return (ENXIO);
  153         }
  154 
  155         error = clk_get_by_ofw_index(dev, node, 0, &clock);
  156         if (error != 0) {
  157                 device_printf(dev, "Cannot find clock parent\n");
  158                 bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
  159                 return (error);
  160         }
  161 
  162         clkname = clk_get_name(clock);
  163 
  164         for (i = 0; i < NUM_TBG; i++) {
  165                 def.clkdef.parent_names = &clkname;
  166                 def.clkdef.parent_cnt = 1;
  167                 def.clkdef.id = i;
  168                 def.clkdef.name = tbg[i].name;
  169 
  170                 def.vcodiv.offset = tbg[i].vcodiv_offset;
  171                 def.vcodiv.shift = tbg[i].vcodiv_shift;
  172                 def.refdiv.offset = TBG_CTRL7;
  173                 def.refdiv.shift = tbg[i].refdiv_shift;
  174                 def.fbdiv.offset = TBG_CTRL0;
  175                 def.fbdiv.shift = tbg[i].fbdiv_shift;
  176                 def.vcodiv.mask = def.refdiv.mask = def.fbdiv.mask = TBG_MASK;
  177                 def.tbg_bypass.offset = TBG_CTRL1;
  178                 def.tbg_bypass.shift = tbg[i].tbg_bypass_en;
  179                 def.tbg_bypass.mask = 0x1;
  180 
  181                 error = a37x0_tbg_pll_clk_register(sc->clkdom, &def);
  182 
  183                 if (error) {
  184                         device_printf(dev, "Cannot register clock node\n");
  185                         bus_release_resources(dev, a37x0_tbg_clk_spec,
  186                             &sc->res);
  187                         return (ENXIO);
  188                 }
  189         }
  190 
  191         error = clkdom_finit(sc->clkdom);
  192         if (error) {
  193                 device_printf(dev,
  194                     "Cannot finalize clock domain intialization\n");
  195                 bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
  196                 return (ENXIO);
  197         }
  198 
  199         if (bootverbose)
  200                 clkdom_dump(sc->clkdom);
  201 
  202         return (0);
  203 }
  204 
  205 static int
  206 a37x0_tbg_probe(device_t dev)
  207 {
  208 
  209         if (!ofw_bus_status_okay(dev))
  210                 return (ENXIO);
  211 
  212         if (!ofw_bus_is_compatible(dev, "marvell,armada-3700-tbg-clock"))
  213                 return (ENXIO);
  214 
  215         device_set_desc(dev, "Marvell Armada 3700 time base generators");
  216         return (BUS_PROBE_DEFAULT);
  217 }
  218 
  219 static int
  220 a37x0_tbg_detach(device_t dev)
  221 {
  222 
  223         return (EBUSY);
  224 }

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