The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/clk/periph_clk_mux_gate.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2021 Semihalf.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 #include <sys/mutex.h>
   36 #include <sys/rman.h>
   37 #include <machine/bus.h>
   38 
   39 #include <dev/fdt/simplebus.h>
   40 
   41 #include <dev/extres/clk/clk.h>
   42 #include <dev/extres/clk/clk_div.h>
   43 #include <dev/extres/clk/clk_fixed.h>
   44 #include <dev/extres/clk/clk_gate.h>
   45 #include <dev/extres/clk/clk_mux.h>
   46 
   47 #include <dev/ofw/ofw_bus.h>
   48 #include <dev/ofw/ofw_bus_subr.h>
   49 
   50 #include "clkdev_if.h"
   51 #include "periph.h"
   52 
   53 #define PARENT_CNT              2
   54 #define TBG_A_S_OFW_INDEX       0
   55 
   56 /*
   57  * Register chain: fixed (freq/2) -> mux (choose fixed or parent frequency) ->
   58  * gate (enable or disable clock).
   59  */
   60 
   61 int
   62 a37x0_periph_register_mux_gate(struct clkdom *clkdom,
   63     struct a37x0_periph_clknode_def *device_def)
   64 {
   65         const char *parent_names[PARENT_CNT];
   66         struct clk_fixed_def fixed;
   67         struct clk_gate_def *gate;
   68         struct clk_mux_def *mux;
   69         int error, dev_id;
   70 
   71         dev_id = device_def->common_def.device_id;
   72         mux = &device_def->clk_def.mux_gate.mux;
   73         gate = &device_def->clk_def.mux_gate.gate;
   74         fixed = device_def->clk_def.fixed.fixed;
   75 
   76         fixed.clkdef.id = A37x0_INTERNAL_CLK_ID(dev_id, FIXED1_POS);
   77         fixed.clkdef.parent_names = &device_def->common_def.pname;
   78         fixed.clkdef.parent_cnt = 1;
   79         fixed.clkdef.flags = 0x0;
   80         fixed.mult = 1;
   81         fixed.div = 2;
   82         fixed.freq = 0;
   83 
   84         error = clknode_fixed_register(clkdom, &fixed);
   85         if (error)
   86                 goto fail;
   87 
   88         parent_names[0] = device_def->common_def.pname;
   89         parent_names[1] = fixed.clkdef.name;
   90 
   91         a37x0_periph_set_props(&mux->clkdef, parent_names, PARENT_CNT);
   92         error = a37x0_periph_create_mux(clkdom, mux,
   93             A37x0_INTERNAL_CLK_ID(dev_id, MUX_POS));
   94         if (error)
   95                 goto fail;
   96 
   97         a37x0_periph_set_props(&gate->clkdef, &mux->clkdef.name, 1);
   98         error = a37x0_periph_create_gate(clkdom, gate,
   99             dev_id);
  100         if (error)
  101                 goto fail;
  102 
  103 fail:
  104 
  105         return (error);
  106 }
  107 
  108 /*
  109  * Register chain: fixed1 (freq/2) -> mux (fixed1 or TBG-A-S frequency) ->
  110  * gate -> fixed2 (freq/2).
  111  */
  112 
  113 int
  114 a37x0_periph_register_mux_gate_fixed(struct clkdom * clkdom,
  115     struct a37x0_periph_clknode_def *device_def)
  116 {
  117         struct clk_fixed_def *fixed1, *fixed2;
  118         const char *parent_names[PARENT_CNT];
  119         struct clk_gate_def *gate;
  120         struct clk_mux_def *mux;
  121         int error, dev_id;
  122 
  123         dev_id = device_def->common_def.device_id;
  124         mux = &device_def->clk_def.mux_gate_fixed.mux;
  125         gate = &device_def->clk_def.mux_gate_fixed.gate;
  126         fixed1 = &device_def->clk_def.mux_gate_fixed.fixed1;
  127         fixed2 = &device_def->clk_def.mux_gate_fixed.fixed2;
  128 
  129         fixed1->clkdef.parent_names = &device_def->common_def.pname;
  130         fixed1->clkdef.id = A37x0_INTERNAL_CLK_ID(dev_id, FIXED1_POS);
  131         fixed1->clkdef.flags = 0x0;
  132         fixed1->mult = 1;
  133         fixed1->div = 2;
  134         fixed1->freq = 0;
  135 
  136         error = clknode_fixed_register(clkdom, fixed1);
  137         if (error)
  138                 goto fail;
  139 
  140         parent_names[0] = device_def->common_def.tbgs[TBG_A_S_OFW_INDEX];
  141         parent_names[1] = fixed1->clkdef.name;
  142 
  143         a37x0_periph_set_props(&mux->clkdef, parent_names, PARENT_CNT);
  144         error = a37x0_periph_create_mux(clkdom, mux,
  145             A37x0_INTERNAL_CLK_ID(dev_id, MUX_POS));
  146         if (error)
  147                 goto fail;
  148 
  149         a37x0_periph_set_props(&gate->clkdef, &mux->clkdef.name, 1);
  150         error = a37x0_periph_create_gate(clkdom, gate,
  151             A37x0_INTERNAL_CLK_ID(dev_id, GATE_POS));
  152         if (error)
  153                 goto fail;
  154 
  155         fixed2->clkdef.parent_names = &gate->clkdef.name;
  156         fixed2->clkdef.parent_cnt = 1;
  157         fixed2->clkdef.id = dev_id;
  158 
  159         error = clknode_fixed_register(clkdom, fixed2);
  160         if (error)
  161                 goto fail;
  162 
  163 fail:
  164 
  165         return (error);
  166 }

Cache object: 75e63e43beabb04486ba7dcd7267c8c4


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