1 /*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * Copyright (C) 2009 Semihalf
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of MARVELL nor the names of contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD: releng/8.1/sys/arm/mv/kirkwood/sheevaplug.c 197251 2009-09-16 12:07:58Z raj $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/kernel.h>
38
39 #include <vm/vm.h>
40 #include <vm/pmap.h>
41
42 #include <machine/bus.h>
43 #include <machine/pte.h>
44 #include <machine/pmap.h>
45 #include <machine/vmparam.h>
46
47 #include <arm/mv/mvreg.h>
48 #include <arm/mv/mvvar.h>
49 #include <arm/mv/mvwin.h>
50
51 /*
52 * Virtual address space layout:
53 * -----------------------------
54 * 0x0000_0000 - 0x7FFF_FFFF : User Process (2 GB)
55 * 0x8000_0000 - 0xBBFF_FFFF : Unused (960 MB)
56 * 0xBC00_0000 - 0xBDFF_FFFF : Device Bus: CS1 (32 MB)
57 * 0xBE00_0000 - 0xBECF_FFFF : Unused (13 MB)
58 * 0xBED0_0000 - 0xBEDF_FFFF : Device Bus: CS2 (1 MB)
59 * 0xBEE0_0000 - 0xBEEF_FFFF : Device Bus: CS0 (1 MB)
60 * 0xBEF0_0000 - 0xBEFF_FFFF : Device Bus: BOOT (1 MB)
61 * 0xBF00_0000 - 0xBFFF_FFFF : Unused (16 MB)
62 * 0xC000_0000 - virtual_avail : Kernel Reserved (text, data, page tables,
63 * : stack etc.)
64 * virtual-avail - 0xEFFF_FFFF : KVA (virtual_avail is typically < 0xc0a0_0000)
65 * 0xF000_0000 - 0xF0FF_FFFF : No-Cache allocation area (16 MB)
66 * 0xF100_0000 - 0xF10F_FFFF : SoC Integrated devices registers range (1 MB)
67 * 0xF110_0000 - 0xF11F_FFFF : CESA SRAM (1 MB)
68 * 0xF120_0000 - 0xFFFE_FFFF : Unused (237 MB + 960 kB)
69 * 0xFFFF_0000 - 0xFFFF_0FFF : 'High' vectors page (4 kB)
70 * 0xFFFF_1000 - 0xFFFF_1FFF : ARM_TP_ADDRESS/RAS page (4 kB)
71 * 0xFFFF_2000 - 0xFFFF_FFFF : Unused (56 kB)
72 */
73
74 /* Static device mappings. */
75 const struct pmap_devmap pmap_devmap[] = {
76 /*
77 * Map the on-board devices VA == PA so that we can access them
78 * with the MMU on or off.
79 */
80 { /* SoC integrated peripherals registers range */
81 MV_BASE,
82 MV_PHYS_BASE,
83 MV_SIZE,
84 VM_PROT_READ | VM_PROT_WRITE,
85 PTE_NOCACHE,
86 },
87 { /* CESA SRAM */
88 MV_CESA_SRAM_BASE,
89 MV_CESA_SRAM_PHYS_BASE,
90 MV_CESA_SRAM_SIZE,
91 VM_PROT_READ | VM_PROT_WRITE,
92 PTE_NOCACHE,
93 },
94 { 0, 0, 0, 0, 0, }
95 };
96
97 const struct gpio_config mv_gpio_config[] = {
98 { -1, -1, -1 }
99 };
100
101 void
102 platform_mpp_init(void)
103 {
104
105 /*
106 * MPP configuration for Sheeva Plug
107 *
108 * MPP[0]: NF_IO[2]
109 * MPP[1]: NF_IO[3]
110 * MPP[2]: NF_IO[4]
111 * MPP[3]: NF_IO[5]
112 * MPP[4]: NF_IO[6]
113 * MPP[5]: NF_IO[7]
114 * MPP[6]: SYSRST_OUTn
115 * MPP[8]: UA0_RTS
116 * MPP[9]: UA0_CTS
117 * MPP[10]: UA0_TXD
118 * MPP[11]: UA0_RXD
119 * MPP[12]: SD_CLK
120 * MPP[13]: SD_CMD
121 * MPP[14]: SD_D[0]
122 * MPP[15]: SD_D[1]
123 * MPP[16]: SD_D[2]
124 * MPP[17]: SD_D[3]
125 * MPP[18]: NF_IO[0]
126 * MPP[19]: NF_IO[1]
127 * MPP[29]: TSMP[9]
128 *
129 * Others: GPIO
130 */
131
132 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL0, 0x01111111);
133 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL1, 0x11113322);
134 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL2, 0x00001111);
135 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL3, 0x00100000);
136 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL4, 0x00000000);
137 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL5, 0x00000000);
138 bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL6, 0x00000000);
139 }
140
141 static void
142 platform_identify(void *dummy)
143 {
144
145 soc_identify();
146
147 /*
148 * XXX Board identification e.g. read out from FPGA or similar should
149 * go here
150 */
151 }
152 SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify, NULL);
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