The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/mv_ap806_clock.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD$
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 
   37 #include <sys/kernel.h>
   38 #include <sys/module.h>
   39 #include <sys/rman.h>
   40 #include <sys/lock.h>
   41 #include <sys/mutex.h>
   42 
   43 #include <machine/bus.h>
   44 #include <machine/resource.h>
   45 #include <machine/intr.h>
   46 
   47 #include <dev/extres/clk/clk_fixed.h>
   48 #include <dev/extres/syscon/syscon.h>
   49 
   50 #include <dev/ofw/ofw_bus.h>
   51 #include <dev/ofw/ofw_bus_subr.h>
   52 
   53 #include "syscon_if.h"
   54 
   55 static struct clk_fixed_def ap806_clk_cluster_0 = {
   56         .clkdef.id = 0,
   57         .clkdef.name = "ap806-cpu-cluster-0",
   58         .freq = 0,
   59 };
   60 
   61 static struct clk_fixed_def ap806_clk_cluster_1 = {
   62         .clkdef.id = 1,
   63         .clkdef.name = "ap806-cpu-cluster-1",
   64         .freq = 0,
   65 };
   66 
   67 static struct clk_fixed_def ap806_clk_fixed = {
   68         .clkdef.id = 2,
   69         .clkdef.name = "ap806-fixed",
   70         .freq = 1200000000,
   71 };
   72 
   73 /* Thoses are the only exported clocks AFAICT */
   74 
   75 static const char *mss_parents[] = {"ap806-fixed"};
   76 static struct clk_fixed_def ap806_clk_mss = {
   77         .clkdef.id = 3,
   78         .clkdef.name = "ap806-mss",
   79         .clkdef.parent_names = mss_parents,
   80         .clkdef.parent_cnt = 1,
   81         .mult = 1,
   82         .div = 6,
   83 };
   84 
   85 static const char *sdio_parents[] = {"ap806-fixed"};
   86 static struct clk_fixed_def ap806_clk_sdio = {
   87         .clkdef.id = 4,
   88         .clkdef.name = "ap806-sdio",
   89         .clkdef.parent_names = sdio_parents,
   90         .clkdef.parent_cnt = 1,
   91         .mult = 1,
   92         .div = 3,
   93 };
   94 
   95 struct mv_ap806_clock_softc {
   96         device_t                dev;
   97         struct syscon           *syscon;
   98 };
   99 
  100 static struct ofw_compat_data compat_data[] = {
  101         {"marvell,ap806-clock", 1},
  102         {NULL,                  0}
  103 };
  104 
  105 #define RD4(sc, reg)            SYSCON_READ_4((sc)->syscon, (reg))
  106 #define WR4(sc, reg, val)       SYSCON_WRITE_4((sc)->syscon, (reg), (val))
  107 
  108 static int
  109 mv_ap806_clock_probe(device_t dev)
  110 {
  111 
  112         if (!ofw_bus_status_okay(dev))
  113                 return (ENXIO);
  114 
  115         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  116                 return (ENXIO);
  117 
  118         device_set_desc(dev, "Marvell AP806 Clock Controller");
  119         return (BUS_PROBE_DEFAULT);
  120 }
  121 
  122 static int
  123 mv_ap806_clock_attach(device_t dev)
  124 {
  125         struct mv_ap806_clock_softc *sc;
  126         struct clkdom *clkdom;
  127         uint64_t clock_freq;
  128         uint32_t reg;
  129 
  130         sc = device_get_softc(dev);
  131         sc->dev = dev;
  132 
  133         if (SYSCON_GET_HANDLE(sc->dev, &sc->syscon) != 0 ||
  134             sc->syscon == NULL) {
  135                 device_printf(dev, "cannot get syscon for device\n");
  136                 return (ENXIO);
  137         }
  138 
  139         reg = RD4(sc, 0x400);
  140         switch (reg & 0x1f) {
  141         case 0x0:
  142         case 0x1:
  143                 clock_freq = 2000000000;
  144                 break;
  145         case 0x4:
  146                 clock_freq = 1600000000;
  147                 break;
  148         case 0x6:
  149                 clock_freq = 1800000000;
  150                 break;
  151         case 0x7:
  152                 clock_freq = 1800000000;
  153                 break;
  154         case 0xb:
  155                 clock_freq = 1600000000;
  156                 break;
  157         case 0xd:
  158                 clock_freq = 1600000000;
  159                 break;
  160         case 0x13:
  161                 clock_freq = 1000000000;
  162                 break;
  163         case 0x14:
  164                 clock_freq = 1333000000;
  165                 break;
  166         case 0x17:
  167                 clock_freq = 1333000000;
  168                 break;
  169         case 0x19:
  170                 clock_freq = 1200000000;
  171                 break;
  172         case 0x1a:
  173                 clock_freq = 1400000000;
  174                 break;
  175         case 0x1b:
  176                 clock_freq = 600000000;
  177                 break;
  178         case 0x1c:
  179                 clock_freq = 800000000;
  180                 break;
  181         case 0x1d:
  182                 clock_freq = 1000000000;
  183                 break;
  184         default:
  185                 device_printf(dev, "Cannot guess clock freq with reg %x\n",
  186                      reg & 0x1f);
  187                 return (ENXIO);
  188                 break;
  189         };
  190 
  191         ap806_clk_cluster_0.freq = clock_freq;
  192         ap806_clk_cluster_1.freq = clock_freq;
  193         clkdom = clkdom_create(dev);
  194 
  195         clknode_fixed_register(clkdom, &ap806_clk_cluster_0);
  196         clknode_fixed_register(clkdom, &ap806_clk_cluster_1);
  197         clknode_fixed_register(clkdom, &ap806_clk_fixed);
  198         clknode_fixed_register(clkdom, &ap806_clk_mss);
  199         clknode_fixed_register(clkdom, &ap806_clk_sdio);
  200 
  201         clkdom_finit(clkdom);
  202 
  203         if (bootverbose)
  204                 clkdom_dump(clkdom);
  205         return (0);
  206 }
  207 
  208 static int
  209 mv_ap806_clock_detach(device_t dev)
  210 {
  211 
  212         return (EBUSY);
  213 }
  214 
  215 static device_method_t mv_ap806_clock_methods[] = {
  216         /* Device interface */
  217         DEVMETHOD(device_probe,         mv_ap806_clock_probe),
  218         DEVMETHOD(device_attach,        mv_ap806_clock_attach),
  219         DEVMETHOD(device_detach,        mv_ap806_clock_detach),
  220 
  221         DEVMETHOD_END
  222 };
  223 
  224 static driver_t mv_ap806_clock_driver = {
  225         "mv_ap806_clock",
  226         mv_ap806_clock_methods,
  227         sizeof(struct mv_ap806_clock_softc),
  228 };
  229 
  230 EARLY_DRIVER_MODULE(mv_ap806_clock, simplebus, mv_ap806_clock_driver, 0, 0,
  231     BUS_PASS_RESOURCE + BUS_PASS_ORDER_LATE);

Cache object: 6256a5f6ef0c4db3394c46456119ff86


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