The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/mv_ap806_clock.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD$
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 
   37 #include <sys/kernel.h>
   38 #include <sys/module.h>
   39 #include <sys/rman.h>
   40 #include <sys/lock.h>
   41 #include <sys/mutex.h>
   42 
   43 #include <machine/bus.h>
   44 #include <machine/resource.h>
   45 #include <machine/intr.h>
   46 
   47 #include <dev/extres/clk/clk_fixed.h>
   48 #include <dev/extres/syscon/syscon.h>
   49 
   50 #include <dev/ofw/ofw_bus.h>
   51 #include <dev/ofw/ofw_bus_subr.h>
   52 
   53 
   54 #include "syscon_if.h"
   55 
   56 static struct clk_fixed_def ap806_clk_cluster_0 = {
   57         .clkdef.id = 0,
   58         .clkdef.name = "ap806-cpu-cluster-0",
   59         .freq = 0,
   60 };
   61 
   62 static struct clk_fixed_def ap806_clk_cluster_1 = {
   63         .clkdef.id = 1,
   64         .clkdef.name = "ap806-cpu-cluster-1",
   65         .freq = 0,
   66 };
   67 
   68 static struct clk_fixed_def ap806_clk_fixed = {
   69         .clkdef.id = 2,
   70         .clkdef.name = "ap806-fixed",
   71         .freq = 1200000000,
   72 };
   73 
   74 /* Thoses are the only exported clocks AFAICT */
   75 
   76 static const char *mss_parents[] = {"ap806-fixed"};
   77 static struct clk_fixed_def ap806_clk_mss = {
   78         .clkdef.id = 3,
   79         .clkdef.name = "ap806-mss",
   80         .clkdef.parent_names = mss_parents,
   81         .clkdef.parent_cnt = 1,
   82         .mult = 1,
   83         .div = 6,
   84 };
   85 
   86 static const char *sdio_parents[] = {"ap806-fixed"};
   87 static struct clk_fixed_def ap806_clk_sdio = {
   88         .clkdef.id = 4,
   89         .clkdef.name = "ap806-sdio",
   90         .clkdef.parent_names = sdio_parents,
   91         .clkdef.parent_cnt = 1,
   92         .mult = 1,
   93         .div = 3,
   94 };
   95 
   96 struct mv_ap806_clock_softc {
   97         device_t                dev;
   98         struct syscon           *syscon;
   99 };
  100 
  101 
  102 
  103 static struct ofw_compat_data compat_data[] = {
  104         {"marvell,ap806-clock", 1},
  105         {NULL,                  0}
  106 };
  107 
  108 #define RD4(sc, reg)            SYSCON_READ_4((sc)->syscon, (reg))
  109 #define WR4(sc, reg, val)       SYSCON_WRITE_4((sc)->syscon, (reg), (val))
  110 
  111 static int
  112 mv_ap806_clock_probe(device_t dev)
  113 {
  114 
  115         if (!ofw_bus_status_okay(dev))
  116                 return (ENXIO);
  117 
  118         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  119                 return (ENXIO);
  120 
  121         device_set_desc(dev, "Marvell AP806 Clock Controller");
  122         return (BUS_PROBE_DEFAULT);
  123 }
  124 
  125 static int
  126 mv_ap806_clock_attach(device_t dev)
  127 {
  128         struct mv_ap806_clock_softc *sc;
  129         struct clkdom *clkdom;
  130         uint64_t clock_freq;
  131         uint32_t reg;
  132 
  133         sc = device_get_softc(dev);
  134         sc->dev = dev;
  135 
  136         if (SYSCON_GET_HANDLE(sc->dev, &sc->syscon) != 0 ||
  137             sc->syscon == NULL) {
  138                 device_printf(dev, "cannot get syscon for device\n");
  139                 return (ENXIO);
  140         }
  141 
  142         reg = RD4(sc, 0x400);
  143         switch (reg & 0x1f) {
  144         case 0x0:
  145         case 0x1:
  146                 clock_freq = 2000000000;
  147                 break;
  148         case 0x4:
  149                 clock_freq = 1600000000;
  150                 break;
  151         case 0x6:
  152                 clock_freq = 1800000000;
  153                 break;
  154         case 0x7:
  155                 clock_freq = 1800000000;
  156                 break;
  157         case 0xb:
  158                 clock_freq = 1600000000;
  159                 break;
  160         case 0xd:
  161                 clock_freq = 1600000000;
  162                 break;
  163         case 0x13:
  164                 clock_freq = 1000000000;
  165                 break;
  166         case 0x14:
  167                 clock_freq = 1333000000;
  168                 break;
  169         case 0x17:
  170                 clock_freq = 1333000000;
  171                 break;
  172         case 0x19:
  173                 clock_freq = 1200000000;
  174                 break;
  175         case 0x1a:
  176                 clock_freq = 1400000000;
  177                 break;
  178         case 0x1b:
  179                 clock_freq = 600000000;
  180                 break;
  181         case 0x1c:
  182                 clock_freq = 800000000;
  183                 break;
  184         case 0x1d:
  185                 clock_freq = 1000000000;
  186                 break;
  187         default:
  188                 device_printf(dev, "Cannot guess clock freq with reg %x\n",
  189                      reg & 0x1f);
  190                 return (ENXIO);
  191                 break;
  192         };
  193 
  194         ap806_clk_cluster_0.freq = clock_freq;
  195         ap806_clk_cluster_1.freq = clock_freq;
  196         clkdom = clkdom_create(dev);
  197 
  198         clknode_fixed_register(clkdom, &ap806_clk_cluster_0);
  199         clknode_fixed_register(clkdom, &ap806_clk_cluster_1);
  200         clknode_fixed_register(clkdom, &ap806_clk_fixed);
  201         clknode_fixed_register(clkdom, &ap806_clk_mss);
  202         clknode_fixed_register(clkdom, &ap806_clk_sdio);
  203 
  204         clkdom_finit(clkdom);
  205 
  206         if (bootverbose)
  207                 clkdom_dump(clkdom);
  208         return (0);
  209 }
  210 
  211 static int
  212 mv_ap806_clock_detach(device_t dev)
  213 {
  214 
  215         return (EBUSY);
  216 }
  217 
  218 static device_method_t mv_ap806_clock_methods[] = {
  219         /* Device interface */
  220         DEVMETHOD(device_probe,         mv_ap806_clock_probe),
  221         DEVMETHOD(device_attach,        mv_ap806_clock_attach),
  222         DEVMETHOD(device_detach,        mv_ap806_clock_detach),
  223 
  224         DEVMETHOD_END
  225 };
  226 
  227 static devclass_t mv_ap806_clock_devclass;
  228 
  229 static driver_t mv_ap806_clock_driver = {
  230         "mv_ap806_clock",
  231         mv_ap806_clock_methods,
  232         sizeof(struct mv_ap806_clock_softc),
  233 };
  234 
  235 EARLY_DRIVER_MODULE(mv_ap806_clock, simplebus, mv_ap806_clock_driver,
  236     mv_ap806_clock_devclass, 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_LATE);

Cache object: 8fbdc822fbfa1dd04e4f17408818787c


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