mv_pci_ctrl.c

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    1 /*-
    2  * Copyright (c) 2016 Stormshield
    3  * Copyright (c) 2016 Semihalf
    4  * All rights reserved.
    5  *
    6  * Developed by Semihalf.
    7  *
    8  * Portions of this software were developed by Semihalf
    9  * under sponsorship from the FreeBSD Foundation.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. Neither the name of MARVELL nor the names of contributors
   20  *    may be used to endorse or promote products derived from this software
   21  *    without specific prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   26  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
   27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  */
   35 
   36 /*
   37  * Marvell integrated PCI/PCI-Express Bus Controller Driver.
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD$");
   42 
   43 #include <sys/param.h>
   44 #include <sys/systm.h>
   45 #include <sys/kernel.h>
   46 #include <sys/lock.h>
   47 #include <sys/malloc.h>
   48 #include <sys/module.h>
   49 #include <sys/bus.h>
   50 #include <sys/rman.h>
   51 
   52 #include <dev/ofw/ofw_bus.h>
   53 #include <dev/ofw/ofw_bus_subr.h>
   54 
   55 static int mv_pcib_ctrl_probe(device_t);
   56 static int mv_pcib_ctrl_attach(device_t);
   57 static device_t mv_pcib_ctrl_add_child(device_t, u_int, const char *, int);
   58 static const struct ofw_bus_devinfo * mv_pcib_ctrl_get_devinfo(device_t, device_t);
   59 static struct resource * mv_pcib_ctrl_alloc_resource(device_t, device_t, int,
   60     int *, rman_res_t, rman_res_t, rman_res_t, u_int);
   61 void mv_pcib_ctrl_init(device_t, phandle_t);
   62 static int mv_pcib_ofw_bus_attach(device_t);
   63 
   64 struct mv_pcib_ctrl_range {
   65         uint64_t bus;
   66         uint64_t host;
   67         uint64_t size;
   68 };
   69 
   70 typedef int (*get_rl_t)(device_t dev, phandle_t node, pcell_t acells,
   71     pcell_t scells, struct resource_list *rl);
   72 
   73 struct mv_pcib_ctrl_softc {
   74         pcell_t                         addr_cells;
   75         pcell_t                         size_cells;
   76         int                             nranges;
   77         struct mv_pcib_ctrl_range       *ranges;
   78 };
   79 
   80 struct mv_pcib_ctrl_devinfo {
   81         struct ofw_bus_devinfo  di_dinfo;
   82         struct resource_list    di_rl;
   83 };
   84 
   85 static int mv_pcib_ctrl_fill_ranges(phandle_t, struct mv_pcib_ctrl_softc *);
   86 
   87 /*
   88  * Bus interface definitions
   89  */
   90 static device_method_t mv_pcib_ctrl_methods[] = {
   91         /* Device interface */
   92         DEVMETHOD(device_probe,                 mv_pcib_ctrl_probe),
   93         DEVMETHOD(device_attach,                mv_pcib_ctrl_attach),
   94 
   95         /* Bus interface */
   96         DEVMETHOD(bus_add_child,                mv_pcib_ctrl_add_child),
   97         DEVMETHOD(bus_alloc_resource,           mv_pcib_ctrl_alloc_resource),
   98         DEVMETHOD(bus_release_resource,         bus_generic_release_resource),
   99         DEVMETHOD(bus_activate_resource,        bus_generic_activate_resource),
  100         DEVMETHOD(bus_deactivate_resource,      bus_generic_deactivate_resource),
  101         DEVMETHOD(bus_setup_intr,               bus_generic_setup_intr),
  102 
  103         /* ofw_bus interface */
  104         DEVMETHOD(ofw_bus_get_devinfo,          mv_pcib_ctrl_get_devinfo),
  105         DEVMETHOD(ofw_bus_get_compat,           ofw_bus_gen_get_compat),
  106         DEVMETHOD(ofw_bus_get_model,            ofw_bus_gen_get_model),
  107         DEVMETHOD(ofw_bus_get_name,             ofw_bus_gen_get_name),
  108         DEVMETHOD(ofw_bus_get_node,             ofw_bus_gen_get_node),
  109         DEVMETHOD(ofw_bus_get_type,             ofw_bus_gen_get_type),
  110 
  111         DEVMETHOD_END
  112 };
  113 
  114 static struct ofw_compat_data mv_pcib_ctrl_compat[] = {
  115         {"mrvl,pcie-ctrl",              (uintptr_t)&ofw_bus_reg_to_rl},
  116         {"marvell,armada-370-pcie",
  117             (uintptr_t)&ofw_bus_assigned_addresses_to_rl},
  118         {NULL,                          (uintptr_t)NULL},
  119 };
  120 
  121 static driver_t mv_pcib_ctrl_driver = {
  122         "pcib_ctrl",
  123         mv_pcib_ctrl_methods,
  124         sizeof(struct mv_pcib_ctrl_softc),
  125 };
  126 
  127 DRIVER_MODULE(pcib_ctrl, simplebus, mv_pcib_ctrl_driver, 0, 0);
  128 
  129 MALLOC_DEFINE(M_PCIB_CTRL, "PCIe Bus Controller",
  130     "Marvell Integrated PCIe Bus Controller");
  131 
  132 static int
  133 mv_pcib_ctrl_probe(device_t dev)
  134 {
  135 
  136         if (!ofw_bus_status_okay(dev))
  137                 return (ENXIO);
  138 
  139         if (!ofw_bus_search_compatible(dev, mv_pcib_ctrl_compat)->ocd_data)
  140                 return (ENXIO);
  141 
  142         device_set_desc(dev, "Marvell Integrated PCIe Bus Controller");
  143         return (BUS_PROBE_DEFAULT);
  144 }
  145 
  146 static int
  147 mv_pcib_ctrl_attach(device_t dev)
  148 {
  149         int err;
  150 
  151         err = mv_pcib_ofw_bus_attach(dev);
  152         if (err != 0)
  153                 return (err);
  154 
  155         return (bus_generic_attach(dev));
  156 }
  157 
  158 static int
  159 mv_pcib_ofw_bus_attach(device_t dev)
  160 {
  161         struct mv_pcib_ctrl_devinfo *di;
  162         struct mv_pcib_ctrl_softc *sc;
  163         device_t child;
  164         phandle_t parent, node;
  165         get_rl_t get_rl;
  166 
  167         parent = ofw_bus_get_node(dev);
  168         sc = device_get_softc(dev);
  169         if (parent > 0) {
  170                 sc->addr_cells = 1;
  171                 if (OF_getencprop(parent, "#address-cells", &(sc->addr_cells),
  172                     sizeof(sc->addr_cells)) <= 0)
  173                         return(ENXIO);
  174 
  175                 sc->size_cells = 1;
  176                 if (OF_getencprop(parent, "#size-cells", &(sc->size_cells),
  177                     sizeof(sc->size_cells)) <= 0)
  178                         return(ENXIO);
  179 
  180                 for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
  181                         di = malloc(sizeof(*di), M_PCIB_CTRL, M_WAITOK | M_ZERO);
  182                         if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
  183                                 if (bootverbose) {
  184                                         device_printf(dev,
  185                                             "Could not set up devinfo for PCI\n");
  186                                 }
  187                                 free(di, M_PCIB_CTRL);
  188                                 continue;
  189                         }
  190 
  191                         child = device_add_child(dev, NULL, -1);
  192                         if (child == NULL) {
  193                                 if (bootverbose) {
  194                                         device_printf(dev,
  195                                             "Could not add child: %s\n",
  196                                             di->di_dinfo.obd_name);
  197                                 }
  198                                 ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
  199                                 free(di, M_PCIB_CTRL);
  200                                 continue;
  201                         }
  202 
  203                         resource_list_init(&di->di_rl);
  204                         get_rl = (get_rl_t) ofw_bus_search_compatible(dev,
  205                             mv_pcib_ctrl_compat)->ocd_data;
  206                         if (get_rl != NULL)
  207                                 get_rl(child, node, sc->addr_cells,
  208                                     sc->size_cells, &di->di_rl);
  209 
  210                         device_set_ivars(child, di);
  211                 }
  212         }
  213 
  214         if (mv_pcib_ctrl_fill_ranges(parent, sc) < 0) {
  215                 device_printf(dev, "could not get ranges\n");
  216                 return (ENXIO);
  217         }
  218 
  219         return (0);
  220 }
  221 
  222 static device_t
  223 mv_pcib_ctrl_add_child(device_t dev, u_int order, const char *name, int unit)
  224 {
  225         device_t cdev;
  226         struct mv_pcib_ctrl_devinfo *di;
  227 
  228         cdev = device_add_child_ordered(dev, order, name, unit);
  229         if (cdev == NULL)
  230                 return (NULL);
  231 
  232         di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
  233         di->di_dinfo.obd_node = -1;
  234         resource_list_init(&di->di_rl);
  235         device_set_ivars(cdev, di);
  236 
  237         return (cdev);
  238 }
  239 
  240 static struct resource *
  241 mv_pcib_ctrl_alloc_resource(device_t bus, device_t child, int type, int *rid,
  242     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
  243 {
  244         struct mv_pcib_ctrl_devinfo *di;
  245         struct resource_list_entry *rle;
  246         struct mv_pcib_ctrl_softc *sc;
  247         int i;
  248 
  249         if (RMAN_IS_DEFAULT_RANGE(start, end)) {
  250                 if ((di = device_get_ivars(child)) == NULL)
  251                         return (NULL);
  252                 if (type != SYS_RES_MEMORY)
  253                         return (NULL);
  254 
  255                 /* Find defaults for this rid */
  256                 rle = resource_list_find(&di->di_rl, type, *rid);
  257 
  258                 if (rle == NULL)
  259                         return (NULL);
  260 
  261                 start = rle->start;
  262                 end = rle->end;
  263                 count = rle->count;
  264         }
  265 
  266         sc = device_get_softc(bus);
  267         if (type == SYS_RES_MEMORY) {
  268                 /* Remap through ranges property */
  269                 for (i = 0; i < sc->nranges; i++) {
  270                         if (start >= sc->ranges[i].bus && end <
  271                             sc->ranges[i].bus + sc->ranges[i].size) {
  272                                 start -= sc->ranges[i].bus;
  273                                 start += sc->ranges[i].host;
  274                                 end -= sc->ranges[i].bus;
  275                                 end += sc->ranges[i].host;
  276                                 break;
  277                         }
  278                 }
  279 
  280                 if (i == sc->nranges && sc->nranges != 0) {
  281                         device_printf(bus, "Could not map resource "
  282                             "%#llx-%#llx\n", start, end);
  283                         return (NULL);
  284                 }
  285         }
  286 
  287         return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
  288             count, flags));
  289 }
  290 
  291 static int
  292 mv_pcib_ctrl_fill_ranges(phandle_t node, struct mv_pcib_ctrl_softc *sc)
  293 {
  294         int host_address_cells;
  295         cell_t *base_ranges;
  296         ssize_t nbase_ranges;
  297         int err;
  298         int i, j, k;
  299 
  300         err = OF_searchencprop(OF_parent(node), "#address-cells",
  301             &host_address_cells, sizeof(host_address_cells));
  302         if (err <= 0)
  303                 return (-1);
  304 
  305         nbase_ranges = OF_getproplen(node, "ranges");
  306         if (nbase_ranges < 0)
  307                 return (-1);
  308         sc->nranges = nbase_ranges / sizeof(cell_t) /
  309             (sc->addr_cells + host_address_cells + sc->size_cells);
  310         if (sc->nranges == 0)
  311                 return (0);
  312 
  313         sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
  314             M_DEVBUF, M_WAITOK);
  315         base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
  316         OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
  317 
  318         for (i = 0, j = 0; i < sc->nranges; i++) {
  319                 sc->ranges[i].bus = 0;
  320                 for (k = 0; k < sc->addr_cells; k++) {
  321                         sc->ranges[i].bus <<= 32;
  322                         sc->ranges[i].bus |= base_ranges[j++];
  323                 }
  324                 sc->ranges[i].host = 0;
  325                 for (k = 0; k < host_address_cells; k++) {
  326                         sc->ranges[i].host <<= 32;
  327                         sc->ranges[i].host |= base_ranges[j++];
  328                 }
  329                 sc->ranges[i].size = 0;
  330                 for (k = 0; k < sc->size_cells; k++) {
  331                         sc->ranges[i].size <<= 32;
  332                         sc->ranges[i].size |= base_ranges[j++];
  333                 }
  334         }
  335 
  336         free(base_ranges, M_DEVBUF);
  337         return (sc->nranges);
  338 }
  339 
  340 static const struct ofw_bus_devinfo *
  341 mv_pcib_ctrl_get_devinfo(device_t bus __unused, device_t child)
  342 {
  343         struct mv_pcib_ctrl_devinfo *di;
  344 
  345         di = device_get_ivars(child);
  346         return (&di->di_dinfo);
  347 }
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FreeBSD/Linux Kernel Cross Reference sys/arm/mv/mv_pci_ctrl.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/mv_pci_ctrl.c
