1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * All rights reserved.
6 *
7 * Developed by Semihalf.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of MARVELL nor the names of contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD: releng/12.0/sys/arm/mv/orion/db88f5xxx.c 326023 2017-11-20 19:43:44Z pfg $");
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/bus.h>
40 #include <sys/kernel.h>
41
42 #include <vm/vm.h>
43 #include <vm/pmap.h>
44
45 #include <machine/bus.h>
46 #include <machine/intr.h>
47 #include <machine/vmparam.h>
48
49 #include <arm/mv/mvreg.h>
50 #include <arm/mv/mvvar.h>
51 #include <arm/mv/mvwin.h>
52
53 /*
54 * Virtual address space layout:
55 * -----------------------------
56 * 0x0000_0000 - 0xbfff_ffff : user process
57 *
58 * 0xc040_0000 - virtual_avail : kernel reserved (text, data, page tables
59 * : structures, ARM stacks etc.)
60 * virtual_avail - 0xefff_ffff : KVA (virtual_avail is typically < 0xc0a0_0000)
61 * 0xf000_0000 - 0xf0ff_ffff : no-cache allocation area (16MB)
62 * 0xf100_0000 - 0xf10f_ffff : SoC integrated devices registers range (1MB)
63 * 0xf110_0000 - 0xf11f_ffff : PCI-Express I/O space (1MB)
64 * 0xf120_0000 - 0xf12f_ffff : PCI I/O space (1MB)
65 * 0xf130_0000 - 0xf52f_ffff : PCI-Express memory space (64MB)
66 * 0xf530_0000 - 0xf92f_ffff : PCI memory space (64MB)
67 * 0xf930_0000 - 0xfffe_ffff : unused (~108MB)
68 * 0xffff_0000 - 0xffff_0fff : 'high' vectors page (4KB)
69 * 0xffff_1000 - 0xffff_1fff : ARM_TP_ADDRESS/RAS page (4KB)
70 * 0xffff_2000 - 0xffff_ffff : unused (~55KB)
71 */
72
73
74 #if 0
75 int platform_pci_get_irq(u_int bus, u_int slot, u_int func, u_int pin);
76
77 /* Static device mappings. */
78 const struct devmap_entry db88f5xxx_devmap[] = {
79 /*
80 * Map the on-board devices VA == PA so that we can access them
81 * with the MMU on or off.
82 */
83 { /* SoC integrated peripherals registers range */
84 MV_BASE,
85 MV_PHYS_BASE,
86 MV_SIZE,
87 },
88 { /* PCIE I/O */
89 MV_PCIE_IO_BASE,
90 MV_PCIE_IO_PHYS_BASE,
91 MV_PCIE_IO_SIZE,
92 },
93 { /* PCIE Memory */
94 MV_PCIE_MEM_BASE,
95 MV_PCIE_MEM_PHYS_BASE,
96 MV_PCIE_MEM_SIZE,
97 },
98 { /* PCI I/O */
99 MV_PCI_IO_BASE,
100 MV_PCI_IO_PHYS_BASE,
101 MV_PCI_IO_SIZE,
102 },
103 { /* PCI Memory */
104 MV_PCI_MEM_BASE,
105 MV_PCI_MEM_PHYS_BASE,
106 MV_PCI_MEM_SIZE,
107 },
108 { /* 7-seg LED */
109 MV_DEV_CS0_BASE,
110 MV_DEV_CS0_PHYS_BASE,
111 MV_DEV_CS0_SIZE,
112 },
113 { 0, 0, 0, }
114 };
115
116 /*
117 * The pci_irq_map table consists of 3 columns:
118 * - PCI slot number (less than zero means ANY).
119 * - PCI IRQ pin (less than zero means ANY).
120 * - PCI IRQ (less than zero marks end of table).
121 *
122 * IRQ number from the first matching entry is used to configure PCI device
123 */
124
125 /* PCI IRQ Map for DB-88F5281 */
126 const struct obio_pci_irq_map pci_irq_map[] = {
127 { 7, -1, GPIO2IRQ(12) },
128 { 8, -1, GPIO2IRQ(13) },
129 { 9, -1, GPIO2IRQ(13) },
130 { -1, -1, -1 }
131 };
132
133 /* PCI IRQ Map for DB-88F5182 */
134 const struct obio_pci_irq_map pci_irq_map[] = {
135 { 7, -1, GPIO2IRQ(0) },
136 { 8, -1, GPIO2IRQ(1) },
137 { 9, -1, GPIO2IRQ(1) },
138 { -1, -1, -1 }
139 };
140 #endif
141
142 #if 0
143 /*
144 * mv_gpio_config row structure:
145 * <GPIO number>, <GPIO flags>, <GPIO mode>
146 *
147 * - GPIO pin number (less than zero marks end of table)
148 * - GPIO flags:
149 * MV_GPIO_BLINK
150 * MV_GPIO_POLAR_LOW
151 * MV_GPIO_EDGE
152 * MV_GPIO_LEVEL
153 * - GPIO mode:
154 * 1 - Output, set to HIGH.
155 * 0 - Output, set to LOW.
156 * -1 - Input.
157 */
158
159 /* GPIO Configuration for DB-88F5281 */
160 const struct gpio_config mv_gpio_config[] = {
161 { 12, MV_GPIO_POLAR_LOW | MV_GPIO_LEVEL, -1 },
162 { 13, MV_GPIO_POLAR_LOW | MV_GPIO_LEVEL, -1 },
163 { -1, -1, -1 }
164 };
165
166 #if 0
167 /* GPIO Configuration for DB-88F5182 */
168 const struct gpio_config mv_gpio_config[] = {
169 { 0, MV_GPIO_POLAR_LOW | MV_GPIO_LEVEL, -1 },
170 { 1, MV_GPIO_POLAR_LOW | MV_GPIO_LEVEL, -1 },
171 { -1, -1, -1 }
172 };
173 #endif
174
175 #endif
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