The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/mv/orion/orion.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-3-Clause
    3  *
    4  * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
    5  * All rights reserved.
    6  *
    7  * Developed by Semihalf.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. Neither the name of MARVELL nor the names of contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  */
   33 
   34 #include <sys/cdefs.h>
   35 __FBSDID("$FreeBSD: head/sys/arm/mv/orion/orion.c 326023 2017-11-20 19:43:44Z pfg $");
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #include <sys/bus.h>
   40 
   41 #include <machine/bus.h>
   42 #include <machine/fdt.h>
   43 
   44 #include <arm/mv/mvreg.h>
   45 #include <arm/mv/mvvar.h>
   46 #include <arm/mv/mvwin.h>
   47 
   48 #if 0
   49 extern const struct obio_pci_irq_map pci_irq_map[];
   50 const struct obio_pci mv_pci_info[] = {
   51         { MV_TYPE_PCIE,
   52                 MV_PCIE_BASE,   MV_PCIE_SIZE,
   53                 MV_PCIE_IO_BASE, MV_PCIE_IO_SIZE,       4, 0x51,
   54                 MV_PCIE_MEM_BASE, MV_PCIE_MEM_SIZE,     4, 0x59,
   55                 NULL, MV_INT_PEX0
   56         },
   57 
   58         { MV_TYPE_PCI,
   59                 MV_PCI_BASE, MV_PCI_SIZE,
   60                 MV_PCI_IO_BASE, MV_PCI_IO_SIZE,         3, 0x51,
   61                 MV_PCI_MEM_BASE, MV_PCI_MEM_SIZE,       3, 0x59,
   62                 pci_irq_map, -1
   63         },
   64 
   65         { 0, 0, 0 }
   66 };
   67 #endif
   68 
   69 struct resource_spec mv_gpio_res[] = {
   70         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   71         { SYS_RES_IRQ,          0,      RF_ACTIVE },
   72         { SYS_RES_IRQ,          1,      RF_ACTIVE },
   73         { SYS_RES_IRQ,          2,      RF_ACTIVE },
   74         { SYS_RES_IRQ,          3,      RF_ACTIVE },
   75         { -1, 0 }
   76 };
   77 
   78 const struct decode_win idma_win_tbl[] = {
   79         { 0 },
   80 };
   81 const struct decode_win *idma_wins = idma_win_tbl;
   82 int idma_wins_no = 0;
   83 
   84 uint32_t
   85 get_tclk(void)
   86 {
   87         uint32_t sar;
   88 
   89         /*
   90          * On Orion TCLK is can be configured to 150 MHz or 166 MHz.
   91          * Current setting is read from Sample At Reset register.
   92          */
   93         /* XXX MPP addr should be retrieved from the DT */
   94         sar = bus_space_read_4(fdtbus_bs_tag, MV_MPP_BASE, SAMPLE_AT_RESET);
   95         sar = (sar & TCLK_MASK) >> TCLK_SHIFT;
   96         switch (sar) {
   97         case 1:
   98                 return (TCLK_150MHZ);
   99         case 2:
  100                 return (TCLK_166MHZ);
  101         default:
  102                 panic("Unknown TCLK settings!");
  103         }
  104 }
  105 
  106 uint32_t
  107 get_cpu_freq(void)
  108 {
  109 
  110         return (0);
  111 }

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