1 /*-
2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 #ifndef _AS3722_H_
30
31 #include <sys/clock.h>
32
33 #define AS3722_SD0_VOLTAGE 0x00
34 #define AS3722_SD_VSEL_MASK 0x7F /* For all SD */
35 #define AS3722_SD0_VSEL_MIN 0x01
36 #define AS3722_SD0_VSEL_MAX 0x5A
37 #define AS3722_SD0_VSEL_LOW_VOL_MAX 0x6E
38
39 #define AS3722_SD1_VOLTAGE 0x01
40 #define AS3722_SD2_VOLTAGE 0x02
41 #define AS3722_SD2_VSEL_MIN 0x01
42 #define AS3722_SD2_VSEL_MAX 0x7F
43 #define AS3722_SD3_VOLTAGE 0x03
44 #define AS3722_SD4_VOLTAGE 0x04
45 #define AS3722_SD5_VOLTAGE 0x05
46 #define AS3722_SD6_VOLTAGE 0x06
47 #define AS3722_GPIO0_CONTROL 0x08
48 #define AS3722_GPIO_INVERT 0x80
49 #define AS3722_GPIO_IOSF_MASK 0x0F
50 #define AS3722_GPIO_IOSF_SHIFT 3
51 #define AS3722_GPIO_MODE_MASK 0x07
52 #define AS3722_GPIO_MODE_SHIFT 0
53
54 #define AS3722_GPIO1_CONTROL 0x09
55 #define AS3722_GPIO2_CONTROL 0x0A
56 #define AS3722_GPIO3_CONTROL 0x0B
57 #define AS3722_GPIO4_CONTROL 0x0C
58 #define AS3722_GPIO5_CONTROL 0x0D
59 #define AS3722_GPIO6_CONTROL 0x0E
60 #define AS3722_GPIO7_CONTROL 0x0F
61 #define AS3722_LDO0_VOLTAGE 0x10
62 #define AS3722_LDO0_VSEL_MASK 0x1F
63 #define AS3722_LDO0_VSEL_MIN 0x01
64 #define AS3722_LDO0_VSEL_MAX 0x12
65 #define AS3722_LDO0_NUM_VOLT 0x12
66
67 #define AS3722_LDO1_VOLTAGE 0x11
68 #define AS3722_LDO_VSEL_MASK 0x7F
69 #define AS3722_LDO_VSEL_MIN 0x01
70 #define AS3722_LDO_VSEL_MAX 0x7F
71 #define AS3722_LDO_VSEL_DNU_MIN 0x25
72 #define AS3722_LDO_VSEL_DNU_MAX 0x3F
73 #define AS3722_LDO_NUM_VOLT 0x80
74
75 #define AS3722_LDO2_VOLTAGE 0x12
76 #define AS3722_LDO3_VOLTAGE 0x13
77 #define AS3722_LDO3_VSEL_MASK 0x3F
78 #define AS3722_LDO3_VSEL_MIN 0x01
79 #define AS3722_LDO3_VSEL_MAX 0x2D
80 #define AS3722_LDO3_NUM_VOLT 0x2D
81 #define AS3722_LDO3_MODE_MASK (0x3 << 6)
82 #define AS3722_LDO3_MODE_GET(x) (((x) >> 6) & 0x3)
83 #define AS3722_LDO3_MODE(x) (((x) & 0x3) << 6)
84 #define AS3722_LDO3_MODE_PMOS AS3722_LDO3_MODE(0)
85 #define AS3722_LDO3_MODE_PMOS_TRACKING AS3722_LDO3_MODE(1)
86 #define AS3722_LDO3_MODE_NMOS AS3722_LDO3_MODE(2)
87 #define AS3722_LDO3_MODE_SWITCH AS3722_LDO3_MODE(3)
88
89 #define AS3722_LDO4_VOLTAGE 0x14
90 #define AS3722_LDO5_VOLTAGE 0x15
91 #define AS3722_LDO6_VOLTAGE 0x16
92 #define AS3722_LDO6_SEL_BYPASS 0x3F
93 #define AS3722_LDO7_VOLTAGE 0x17
94 #define AS3722_LDO9_VOLTAGE 0x19
95 #define AS3722_LDO10_VOLTAGE 0x1A
96 #define AS3722_LDO11_VOLTAGE 0x1B
97 #define AS3722_LDO3_SETTINGS 0x1D
98 #define AS3722_GPIO_DEB1 0x1E
99 #define AS3722_GPIO_DEB2 0x1F
100 #define AS3722_GPIO_SIGNAL_OUT 0x20
101 #define AS3722_GPIO_SIGNAL_IN 0x21
102 #define AS3722_REG_SEQU_MOD1 0x22
103 #define AS3722_REG_SEQU_MOD2 0x23
104 #define AS3722_REG_SEQU_MOD3 0x24
105 #define AS3722_SD_PHSW_CTRL 0x27
106 #define AS3722_SD_PHSW_STATUS 0x28
107
108 #define AS3722_SD0_CONTROL 0x29
109 #define AS3722_SD0_MODE_FAST (1 << 4)
110
111 #define AS3722_SD1_CONTROL 0x2A
112 #define AS3722_SD1_MODE_FAST (1 << 4)
113
114 #define AS3722_SDMPH_CONTROL 0x2B
115 #define AS3722_SD23_CONTROL 0x2C
116 #define AS3722_SD3_MODE_FAST (1 << 6)
117 #define AS3722_SD2_MODE_FAST (1 << 2)
118
119 #define AS3722_SD4_CONTROL 0x2D
120 #define AS3722_SD4_MODE_FAST (1 << 2)
121
122 #define AS3722_SD5_CONTROL 0x2E
123 #define AS3722_SD5_MODE_FAST (1 << 2)
124
125 #define AS3722_SD6_CONTROL 0x2F
126 #define AS3722_SD6_MODE_FAST (1 << 4)
127
128 #define AS3722_SD_DVM 0x30
129 #define AS3722_RESET_REASON 0x31
130 #define AS3722_BATTERY_VOLTAGE_MONITOR 0x32
131 #define AS3722_STARTUP_CONTROL 0x33
132 #define AS3722_RESET_TIMER 0x34
133 #define AS3722_REFERENCE_CONTROL 0x35
134 #define AS3722_RESET_CONTROL 0x36
135 #define AS3722_OVERTEMPERATURE_CONTROL 0x37
136 #define AS3722_WATCHDOG_CONTROL 0x38
137 #define AS3722_REG_STANDBY_MOD1 0x39
138 #define AS3722_REG_STANDBY_MOD2 0x3A
139 #define AS3722_REG_STANDBY_MOD3 0x3B
140 #define AS3722_ENABLE_CTRL1 0x3C
141 #define AS3722_SD3_EXT_ENABLE_MASK 0xC0
142 #define AS3722_SD2_EXT_ENABLE_MASK 0x30
143 #define AS3722_SD1_EXT_ENABLE_MASK 0x0C
144 #define AS3722_SD0_EXT_ENABLE_MASK 0x03
145
146 #define AS3722_ENABLE_CTRL2 0x3D
147 #define AS3722_SD6_EXT_ENABLE_MASK 0x30
148 #define AS3722_SD5_EXT_ENABLE_MASK 0x0C
149 #define AS3722_SD4_EXT_ENABLE_MASK 0x03
150
151 #define AS3722_ENABLE_CTRL3 0x3E
152 #define AS3722_LDO3_EXT_ENABLE_MASK 0xC0
153 #define AS3722_LDO2_EXT_ENABLE_MASK 0x30
154 #define AS3722_LDO1_EXT_ENABLE_MASK 0x0C
155 #define AS3722_LDO0_EXT_ENABLE_MASK 0x03
156
157 #define AS3722_ENABLE_CTRL4 0x3F
158 #define AS3722_LDO7_EXT_ENABLE_MASK 0xC0
159 #define AS3722_LDO6_EXT_ENABLE_MASK 0x30
160 #define AS3722_LDO5_EXT_ENABLE_MASK 0x0C
161 #define AS3722_LDO4_EXT_ENABLE_MASK 0x03
162
163 #define AS3722_ENABLE_CTRL5 0x40
164 #define AS3722_LDO11_EXT_ENABLE_MASK 0xC0
165 #define AS3722_LDO10_EXT_ENABLE_MASK 0x30
166 #define AS3722_LDO9_EXT_ENABLE_MASK 0x0C
167
168 #define AS3722_PWM_CONTROL_L 0x41
169 #define AS3722_PWM_CONTROL_H 0x42
170 #define AS3722_WATCHDOG_TIMER 0x46
171 #define AS3722_WATCHDOG_SOFTWARE_SIGNAL 0x48
172 #define AS3722_IO_VOLTAGE 0x49
173 #define AS3722_I2C_PULL_UP (1 << 4)
174 #define AS3722_INT_PULL_UP (1 << 5)
175
176 #define AS3722_BATTERY_VOLTAGE_MONITOR2 0x4A
177 #define AS3722_SD_CONTROL 0x4D
178 #define AS3722_SDN_CTRL(x) (1 << (x))
179
180 #define AS3722_LDO_CONTROL0 0x4E
181 #define AS3722_LDO7_CTRL (1 << 7)
182 #define AS3722_LDO6_CTRL (1 << 6)
183 #define AS3722_LDO5_CTRL (1 << 5)
184 #define AS3722_LDO4_CTRL (1 << 4)
185 #define AS3722_LDO3_CTRL (1 << 3)
186 #define AS3722_LDO2_CTRL (1 << 2)
187 #define AS3722_LDO1_CTRL (1 << 1)
188 #define AS3722_LDO0_CTRL (1 << 0)
189
190 #define AS3722_LDO_CONTROL1 0x4F
191 #define AS3722_LDO11_CTRL (1 << 3)
192 #define AS3722_LDO10_CTRL (1 << 2)
193 #define AS3722_LDO9_CTRL (1 << 1)
194
195 #define AS3722_SD0_PROTECT 0x50
196 #define AS3722_SD6_PROTECT 0x51
197 #define AS3722_PWM_VCONTROL1 0x52
198 #define AS3722_PWM_VCONTROL2 0x53
199 #define AS3722_PWM_VCONTROL3 0x54
200 #define AS3722_PWM_VCONTROL4 0x55
201 #define AS3722_BB_CHARGER 0x57
202 #define AS3722_CTRL_SEQU1 0x58
203 #define AS3722_CTRL_SEQU2 0x59
204 #define AS3722_OV_CURRENT 0x5A
205 #define AS3722_OV_CURRENT_DEB 0x5B
206 #define AS3722_SDLV_DEB 0x5C
207 #define AS3722_OC_PG_CTRL 0x5D
208 #define AS3722_OC_PG_CTRL2 0x5E
209 #define AS3722_CTRL_STATUS 0x5F
210 #define AS3722_RTC_CONTROL 0x60
211 #define AS3722_RTC_AM_PM_MODE (1 << 7)
212 #define AS3722_RTC_CLK32K_OUT_EN (1 << 5)
213 #define AS3722_RTC_IRQ_MODE (1 << 3)
214 #define AS3722_RTC_ON (1 << 2)
215 #define AS3722_RTC_ALARM_WAKEUP_EN (1 << 1)
216 #define AS3722_RTC_REP_WAKEUP_EN (1 << 0)
217
218 #define AS3722_RTC_SECOND 0x61
219 #define AS3722_RTC_MINUTE 0x62
220 #define AS3722_RTC_HOUR 0x63
221 #define AS3722_RTC_DAY 0x64
222 #define AS3722_RTC_MONTH 0x65
223 #define AS3722_RTC_YEAR 0x66
224 #define AS3722_RTC_ALARM_SECOND 0x67
225 #define AS3722_RTC_ALARM_MINUTE 0x68
226 #define AS3722_RTC_ALARM_HOUR 0x69
227 #define AS3722_RTC_ALARM_DAY 0x6A
228 #define AS3722_RTC_ALARM_MONTH 0x6B
229 #define AS3722_RTC_ALARM_YEAR 0x6C
230 #define AS3722_SRAM 0x6D
231 #define AS3722_RTC_ACCESS 0x6F
232 #define AS3722_REG_STATUS 0x73
233 #define AS3722_INTERRUPT_MASK1 0x74
234 #define AS3722_INTERRUPT_MASK2 0x75
235 #define AS3722_INTERRUPT_MASK3 0x76
236 #define AS3722_INTERRUPT_MASK4 0x77
237 #define AS3722_INTERRUPT_STATUS1 0x78
238 #define AS3722_INTERRUPT_STATUS2 0x79
239 #define AS3722_INTERRUPT_STATUS3 0x7A
240 #define AS3722_INTERRUPT_STATUS4 0x7B
241 #define AS3722_TEMP_STATUS 0x7D
242 #define AS3722_ADC0_CONTROL 0x80
243 #define AS3722_ADC1_CONTROL 0x81
244 #define AS3722_ADC0_MSB_RESULT 0x82
245 #define AS3722_ADC0_LSB_RESULT 0x83
246 #define AS3722_ADC1_MSB_RESULT 0x84
247 #define AS3722_ADC1_LSB_RESULT 0x85
248 #define AS3722_ADC1_THRESHOLD_HI_MSB 0x86
249 #define AS3722_ADC1_THRESHOLD_HI_LSB 0x87
250 #define AS3722_ADC1_THRESHOLD_LO_MSB 0x88
251 #define AS3722_ADC1_THRESHOLD_LO_LSB 0x89
252 #define AS3722_ADC_CONFIGURATION 0x8A
253 #define AS3722_ASIC_ID1 0x90
254 #define AS3722_ASIC_ID2 0x91
255 #define AS3722_LOCK 0x9E
256 #define AS3722_FUSE7 0x9E
257 #define AS3722_FUSE7_SD0_LOW_VOLTAGE (1 << 4)
258
259 struct as3722_reg_sc;
260 struct as3722_gpio_pin;
261
262 struct as3722_softc {
263 device_t dev;
264 struct sx lock;
265 int bus_addr;
266 struct resource *irq_res;
267 void *irq_h;
268
269 uint8_t chip_rev;
270 int int_pullup;
271 int i2c_pullup;
272
273 /* Regulators. */
274 struct as3722_reg_sc **regs;
275 int nregs;
276
277 /* GPIO */
278 device_t gpio_busdev;
279 struct as3722_gpio_pin **gpio_pins;
280 int gpio_npins;
281 struct sx gpio_lock;
282
283 };
284
285 #define RD1(sc, reg, val) as3722_read(sc, reg, val)
286 #define WR1(sc, reg, val) as3722_write(sc, reg, val)
287 #define RM1(sc, reg, clr, set) as3722_modify(sc, reg, clr, set)
288
289 int as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val);
290 int as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val);
291 int as3722_modify(struct as3722_softc *sc, uint8_t reg, uint8_t clear,
292 uint8_t set);
293 int as3722_read_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf,
294 size_t size);
295 int as3722_write_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf,
296 size_t size);
297
298 /* Regulators */
299 int as3722_regulator_attach(struct as3722_softc *sc, phandle_t node);
300 int as3722_regulator_map(device_t dev, phandle_t xref, int ncells,
301 pcell_t *cells, int *num);
302
303 /* RTC */
304 int as3722_rtc_attach(struct as3722_softc *sc, phandle_t node);
305 int as3722_rtc_gettime(device_t dev, struct timespec *ts);
306 int as3722_rtc_settime(device_t dev, struct timespec *ts);
307
308 /* GPIO */
309 device_t as3722_gpio_get_bus(device_t dev);
310 int as3722_gpio_pin_max(device_t dev, int *maxpin);
311 int as3722_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
312 int as3722_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags);
313 int as3722_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
314 int as3722_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
315 int as3722_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
316 int as3722_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
317 int as3722_gpio_pin_toggle(device_t dev, uint32_t pin);
318 int as3722_gpio_map_gpios(device_t dev, phandle_t pdev, phandle_t gparent,
319 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags);
320 int as3722_gpio_attach(struct as3722_softc *sc, phandle_t node);
321 int as3722_pinmux_configure(device_t dev, phandle_t cfgxref);
322
323 #endif /* _AS3722_H_ */
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