The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/arm/qualcomm/ipq4018_mp.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  */
   27 
   28 #include "opt_platform.h"
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 #include <sys/reboot.h>
   37 #include <sys/devmap.h>
   38 #include <sys/smp.h>
   39 
   40 #include <vm/vm.h>
   41 
   42 #include <machine/cpu.h>
   43 #include <machine/bus.h>
   44 #include <machine/intr.h>
   45 #include <machine/machdep.h>
   46 #include <machine/platformvar.h>
   47 #include <machine/smp.h>
   48 
   49 #include <dev/fdt/fdt_common.h>
   50 #include <dev/ofw/openfirm.h>
   51 #include <dev/ofw/ofw_cpu.h>
   52 
   53 #include <arm/qualcomm/ipq4018_machdep.h>
   54 #include <arm/qualcomm/qcom_scm_legacy.h>
   55 #include <arm/qualcomm/qcom_cpu_kpssv2.h>
   56 
   57 #include "platform_if.h"
   58 
   59 void
   60 ipq4018_mp_setmaxid(platform_t plat)
   61 {
   62         int ncpu;
   63 
   64         /* If we've already set the global vars don't bother to do it again. */
   65         if (mp_ncpus != 0)
   66                 return;
   67 
   68         /* Read current CP15 Cache Size ID Register */
   69         ncpu = cp15_l2ctlr_get();
   70         ncpu = CPUV7_L2CTLR_NPROC(ncpu);
   71 
   72         mp_ncpus = ncpu;
   73         mp_maxid = ncpu - 1;
   74 
   75         printf("SMP: ncpu=%d\n", ncpu);
   76 }
   77 
   78 static boolean_t
   79 ipq4018_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *arg)
   80 {
   81 
   82         /*
   83          * For the IPQ401x we assume the enable method is
   84          * "qcom,kpss-acc-v2".  If this path gets turned into
   85          * something more generic for other 32 bit qualcomm
   86          * SoCs then we'll likely want to turn this into a
   87          * switch based on "enable-method".
   88          */
   89         return qcom_cpu_kpssv2_regulator_start(id, node);
   90 }
   91 
   92 void
   93 ipq4018_mp_start_ap(platform_t plat)
   94 {
   95         int ret;
   96 
   97         /*
   98          * First step - SCM call to set the cold boot address to mpentry, so
   99          * CPUs hopefully start in the MP path.
  100          */
  101         ret = qcom_scm_legacy_mp_set_cold_boot_address((vm_offset_t) mpentry);
  102         if (ret != 0)
  103                 panic("%s: Couldn't set cold boot address via SCM "
  104                     "(error 0x%08x)", __func__, ret);
  105 
  106         /*
  107          * Next step - loop over the CPU nodes and do the per-CPU setup
  108          * required to power on the CPUs themselves.
  109          */
  110         ofw_cpu_early_foreach(ipq4018_start_ap, true);
  111 
  112         /*
  113          * The next set of IPIs to the CPUs will wake them up and enter
  114          * mpentry.
  115          */
  116 }

Cache object: 46f4c81ae3ef21e759908af3c5d58c8f


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.