rk30xx_mp.c

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    1 /*-
    2  * Copyright (c) 2014 Ganbold Tsagaankhuu <ganbold@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   24  */
   25 
   26 #include <sys/cdefs.h>
   27 __FBSDID("$FreeBSD$");
   28 #include <sys/param.h>
   29 #include <sys/systm.h>
   30 #include <sys/bus.h>
   31 #include <sys/kernel.h>
   32 #include <sys/lock.h>
   33 #include <sys/mutex.h>
   34 #include <sys/smp.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/pmap.h>
   38 
   39 #include <machine/cpu.h>
   40 #include <machine/cpu-v6.h>
   41 #include <machine/smp.h>
   42 #include <machine/fdt.h>
   43 #include <machine/intr.h>
   44 #include <machine/platformvar.h>
   45 
   46 #include <arm/rockchip/rk30xx_mp.h>
   47 
   48 #define SCU_PHYSBASE                    0x1013c000
   49 #define SCU_SIZE                        0x100
   50 
   51 #define SCU_CONTROL_REG                 0x00
   52 #define SCU_CONTROL_ENABLE              (1 << 0)
   53 #define SCU_STANDBY_EN                  (1 << 5)
   54 #define SCU_CONFIG_REG                  0x04
   55 #define SCU_CONFIG_REG_NCPU_MASK        0x03
   56 #define SCU_CPUPOWER_REG                0x08
   57 #define SCU_INV_TAGS_REG                0x0c
   58 
   59 #define SCU_FILTER_START_REG            0x10
   60 #define SCU_FILTER_END_REG              0x14
   61 #define SCU_SECURE_ACCESS_REG           0x18
   62 #define SCU_NONSECURE_ACCESS_REG        0x1c
   63 
   64 #define IMEM_PHYSBASE                   0x10080000
   65 #define IMEM_SIZE                       0x20
   66 
   67 #define PMU_PHYSBASE                    0x20004000
   68 #define PMU_SIZE                        0x100
   69 #define PMU_PWRDN_CON                   0x08
   70 #define PMU_PWRDN_SCU                   (1 << 4)
   71 
   72 extern char     *mpentry_addr;
   73 static void      rk30xx_boot2(void);
   74 
   75 static void
   76 rk30xx_boot2(void)
   77 {
   78 
   79         __asm __volatile(
   80                            "ldr pc, 1f\n"
   81                            ".globl mpentry_addr\n"
   82                            "mpentry_addr:\n"
   83                         "1: .space 4\n");
   84 }
   85 
   86 void
   87 rk30xx_mp_setmaxid(platform_t plat)
   88 {
   89         bus_space_handle_t scu;
   90         int ncpu;
   91         uint32_t val;
   92 
   93         if (mp_ncpus != 0)
   94                 return;
   95 
   96         if (bus_space_map(fdtbus_bs_tag, SCU_PHYSBASE, SCU_SIZE, 0, &scu) != 0)
   97                 panic("Could not map the SCU");
   98 
   99         val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONFIG_REG);
  100         ncpu = (val & SCU_CONFIG_REG_NCPU_MASK) + 1;
  101         bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
  102 
  103         mp_ncpus = ncpu;
  104         mp_maxid = ncpu - 1;
  105 }
  106 
  107 void
  108 rk30xx_mp_start_ap(platform_t plat)
  109 {
  110         bus_space_handle_t scu;
  111         bus_space_handle_t imem;
  112         bus_space_handle_t pmu;
  113         uint32_t val;
  114         int i;
  115 
  116         if (bus_space_map(fdtbus_bs_tag, SCU_PHYSBASE, SCU_SIZE, 0, &scu) != 0)
  117                 panic("Could not map the SCU");
  118         if (bus_space_map(fdtbus_bs_tag, IMEM_PHYSBASE,
  119             IMEM_SIZE, 0, &imem) != 0)
  120                 panic("Could not map the IMEM");
  121         if (bus_space_map(fdtbus_bs_tag, PMU_PHYSBASE, PMU_SIZE, 0, &pmu) != 0)
  122                 panic("Could not map the PMU");
  123 
  124         /*
  125          * Invalidate SCU cache tags.  The 0x0000ffff constant invalidates all
  126          * ways on all cores 0-3. Per the ARM docs, it's harmless to write to
  127          * the bits for cores that are not present.
  128          */
  129         bus_space_write_4(fdtbus_bs_tag, scu, SCU_INV_TAGS_REG, 0x0000ffff);
  130 
  131         /* Make sure all cores except the first are off */
  132         val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
  133         for (i = 1; i < mp_ncpus; i++)
  134                 val |= 1 << i;
  135         bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
  136 
  137         /* Enable SCU power domain */
  138         val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
  139         val &= ~PMU_PWRDN_SCU;
  140         bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
  141 
  142         /* Enable SCU */
  143         val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG);
  144         bus_space_write_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG,
  145             val | SCU_CONTROL_ENABLE);
  146 
  147         /*
  148          * Cores will execute the code which resides at the start of
  149          * the on-chip bootram/sram after power-on. This sram region
  150          * should be reserved and the trampoline code that directs
  151          * the core to the real startup code in ram should be copied
  152          * into this sram region.
  153          *
  154          * First set boot function for the sram code.
  155          */
  156         mpentry_addr = (char *)pmap_kextract((vm_offset_t)mpentry);
  157 
  158         /* Copy trampoline to sram, that runs during startup of the core */
  159         bus_space_write_region_4(fdtbus_bs_tag, imem, 0,
  160             (uint32_t *)&rk30xx_boot2, 8);
  161 
  162         dcache_wbinv_poc_all();
  163 
  164         /* Start all cores */
  165         val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
  166         for (i = 1; i < mp_ncpus; i++)
  167                 val &= ~(1 << i);
  168         bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
  169 
  170         dsb();
  171         sev();
  172 
  173         bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
  174         bus_space_unmap(fdtbus_bs_tag, imem, IMEM_SIZE);
  175         bus_space_unmap(fdtbus_bs_tag, pmu, PMU_SIZE);
  176 }

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FreeBSD/Linux Kernel Cross Reference sys/arm/rockchip/rk30xx_mp.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/rockchip/rk30xx_mp.c