1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2019 Michal Meloun <mmel@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 #include <sys/smp.h>
38
39 #include <vm/vm.h>
40 #include <vm/pmap.h>
41
42 #include <machine/cpu.h>
43 #include <machine/fdt.h>
44 #include <machine/smp.h>
45 #include <machine/platformvar.h>
46
47 #include <dev/ofw/openfirm.h>
48 #include <dev/ofw/ofw_cpu.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #include <dev/psci/psci.h>
51
52 #include <arm/rockchip/rk32xx_mp.h>
53
54 #define IMEM_PHYSBASE 0xFF700000
55 #define IMEM_SIZE 0x00018000
56
57 #define PMU_PHYSBASE 0xFF730000
58 #define PMU_SIZE 0x00010000
59 #define PMU_PWRDN_CON 0x08
60
61 static int running_cpus;
62 static uint32_t psci_mask, pmu_mask;
63 void
64 rk32xx_mp_setmaxid(platform_t plat)
65 {
66 int ncpu;
67
68 /* If we've already set the global vars don't bother to do it again. */
69 if (mp_ncpus != 0)
70 return;
71
72 /* Read current CP15 Cache Size ID Register */
73 ncpu = cp15_l2ctlr_get();
74 ncpu = CPUV7_L2CTLR_NPROC(ncpu);
75
76 mp_ncpus = ncpu;
77 mp_maxid = ncpu - 1;
78 }
79
80 static void
81 rk32xx_mp_start_pmu(uint32_t mask)
82 {
83 bus_space_handle_t imem;
84 bus_space_handle_t pmu;
85 uint32_t val;
86 int i, rv;
87
88 rv = bus_space_map(fdtbus_bs_tag, IMEM_PHYSBASE, IMEM_SIZE, 0, &imem);
89 if (rv != 0)
90 panic("Couldn't map the IMEM\n");
91 rv = bus_space_map(fdtbus_bs_tag, PMU_PHYSBASE, PMU_SIZE, 0, &pmu);
92 if (rv != 0)
93 panic("Couldn't map the PMU\n");
94
95 /* Power off all secondary cores first */
96 val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
97 for (i = 1; i < mp_ncpus; i++)
98 val |= 1 << i;
99 bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
100 DELAY(5000);
101
102 /* Power up all secondary cores */
103 val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
104 for (i = 1; i < mp_ncpus; i++)
105 val &= ~(1 << i);
106 bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
107 DELAY(5000);
108
109 /* Copy mpentry address then magic to sram */
110 val = pmap_kextract((vm_offset_t)mpentry);
111 bus_space_write_4(fdtbus_bs_tag, imem, 8, val);
112 dsb();
113 bus_space_write_4(fdtbus_bs_tag, imem, 4, 0xDEADBEAF);
114 dsb();
115
116 sev();
117
118 bus_space_unmap(fdtbus_bs_tag, imem, IMEM_SIZE);
119 bus_space_unmap(fdtbus_bs_tag, pmu, PMU_SIZE);
120 }
121
122 static boolean_t
123 rk32xx_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
124 {
125 int rv;
126 char method[16];
127 uint32_t mask;
128
129 if (!ofw_bus_node_status_okay(node))
130 return(false);
131
132 /* Skip boot CPU. */
133 if (id == 0)
134 return (true);
135
136 if (running_cpus >= mp_ncpus)
137 return (false);
138 running_cpus++;
139
140 mask = 1 << (*reg & 0x0f);
141
142 #ifdef INVARIANTS
143 if ((mask & pmu_mask) || (mask & psci_mask))
144 printf("CPU: Duplicated register value: 0x%X for CPU(%d)\n",
145 *reg, id);
146 #endif
147 rv = OF_getprop(node, "enable-method", method, sizeof(method));
148 if (rv > 0 && strcmp(method, "psci") == 0) {
149 psci_mask |= mask;
150 rv = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id);
151 if (rv != PSCI_RETVAL_SUCCESS) {
152 printf("Failed to start CPU(%d)\n", id);
153 return (false);
154 }
155 return (true);
156 }
157
158 pmu_mask |= mask;
159 return (true);
160 }
161
162 void
163 rk32xx_mp_start_ap(platform_t plat)
164 {
165
166 ofw_cpu_early_foreach(rk32xx_start_ap, true);
167 if (pmu_mask != 0 && psci_mask != 0) {
168 printf("Inconsistent CPUs startup methods detected.\n");
169 printf("Only PSCI enabled cores will be started.\n");
170 return;
171 }
172 if (pmu_mask != 0)
173 rk32xx_mp_start_pmu(pmu_mask);
174 }
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