1 /*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Brini.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * RiscBSD kernel project
36 *
37 * machdep.c
38 *
39 * Machine dependant functions for kernel setup
40 *
41 * This file needs a lot of work.
42 *
43 * Created : 17/09/94
44 */
45
46 #include "opt_ddb.h"
47
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD: releng/10.0/sys/arm/s3c2xx0/s3c24x0_machdep.c 247564 2013-03-01 19:02:41Z alc $");
50
51 #define _ARM32_BUS_DMA_PRIVATE
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysproto.h>
55 #include <sys/signalvar.h>
56 #include <sys/imgact.h>
57 #include <sys/kernel.h>
58 #include <sys/ktr.h>
59 #include <sys/linker.h>
60 #include <sys/lock.h>
61 #include <sys/malloc.h>
62 #include <sys/mutex.h>
63 #include <sys/pcpu.h>
64 #include <sys/proc.h>
65 #include <sys/ptrace.h>
66 #include <sys/cons.h>
67 #include <sys/bio.h>
68 #include <sys/bus.h>
69 #include <sys/buf.h>
70 #include <sys/exec.h>
71 #include <sys/kdb.h>
72 #include <sys/msgbuf.h>
73 #include <machine/reg.h>
74 #include <machine/cpu.h>
75
76 #include <vm/vm.h>
77 #include <vm/pmap.h>
78 #include <vm/vm_object.h>
79 #include <vm/vm_page.h>
80 #include <vm/vm_map.h>
81 #include <machine/vmparam.h>
82 #include <machine/pcb.h>
83 #include <machine/undefined.h>
84 #include <machine/machdep.h>
85 #include <machine/metadata.h>
86 #include <machine/armreg.h>
87 #include <machine/bus.h>
88 #include <sys/reboot.h>
89
90 #include <arm/s3c2xx0/s3c24x0var.h>
91 #include <arm/s3c2xx0/s3c2410reg.h>
92 #include <arm/s3c2xx0/s3c2xx0board.h>
93
94 /* Page table for mapping proc0 zero page */
95 #define KERNEL_PT_SYS 0
96 #define KERNEL_PT_KERN 1
97 #define KERNEL_PT_KERN_NUM 44
98 /* L2 table for mapping after kernel */
99 #define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
100 #define KERNEL_PT_AFKERNEL_NUM 5
101
102 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
103 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
104
105 extern int s3c2410_pclk;
106
107 extern u_int data_abort_handler_address;
108 extern u_int prefetch_abort_handler_address;
109 extern u_int undefined_handler_address;
110
111 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
112
113 /* Physical and virtual addresses for some global pages */
114
115 vm_paddr_t phys_avail[10];
116 vm_paddr_t dump_avail[4];
117
118 struct pv_addr systempage;
119 struct pv_addr msgbufpv;
120 struct pv_addr irqstack;
121 struct pv_addr undstack;
122 struct pv_addr abtstack;
123 struct pv_addr kernelstack;
124
125 #define _A(a) ((a) & ~L1_S_OFFSET)
126 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
127
128 /* Static device mappings. */
129 static const struct pmap_devmap s3c24x0_devmap[] = {
130 /*
131 * Map the devices we need early on.
132 */
133 {
134 _A(S3C24X0_CLKMAN_BASE),
135 _A(S3C24X0_CLKMAN_PA_BASE),
136 _S(S3C24X0_CLKMAN_SIZE),
137 VM_PROT_READ|VM_PROT_WRITE,
138 PTE_NOCACHE,
139 },
140 {
141 _A(S3C24X0_GPIO_BASE),
142 _A(S3C24X0_GPIO_PA_BASE),
143 _S(S3C2410_GPIO_SIZE),
144 VM_PROT_READ|VM_PROT_WRITE,
145 PTE_NOCACHE,
146 },
147 {
148 _A(S3C24X0_INTCTL_BASE),
149 _A(S3C24X0_INTCTL_PA_BASE),
150 _S(S3C24X0_INTCTL_SIZE),
151 VM_PROT_READ|VM_PROT_WRITE,
152 PTE_NOCACHE,
153 },
154 {
155 _A(S3C24X0_TIMER_BASE),
156 _A(S3C24X0_TIMER_PA_BASE),
157 _S(S3C24X0_TIMER_SIZE),
158 VM_PROT_READ|VM_PROT_WRITE,
159 PTE_NOCACHE,
160 },
161 {
162 _A(S3C24X0_UART0_BASE),
163 _A(S3C24X0_UART0_PA_BASE),
164 _S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE),
165 VM_PROT_READ|VM_PROT_WRITE,
166 PTE_NOCACHE,
167 },
168 {
169 _A(S3C24X0_WDT_BASE),
170 _A(S3C24X0_WDT_PA_BASE),
171 _S(S3C24X0_WDT_SIZE),
172 VM_PROT_READ|VM_PROT_WRITE,
173 PTE_NOCACHE,
174 },
175 {
176 0,
177 0,
178 0,
179 0,
180 0,
181 }
182 };
183
184 #undef _A
185 #undef _S
186
187 #define ioreg_read32(a) (*(volatile uint32_t *)(a))
188 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
189
190 struct arm32_dma_range s3c24x0_range = {
191 .dr_sysbase = 0,
192 .dr_busbase = 0,
193 .dr_len = 0,
194 };
195
196 struct arm32_dma_range *
197 bus_dma_get_range(void)
198 {
199
200 if (s3c24x0_range.dr_len == 0) {
201 s3c24x0_range.dr_sysbase = dump_avail[0];
202 s3c24x0_range.dr_busbase = dump_avail[0];
203 s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0];
204 }
205 return (&s3c24x0_range);
206 }
207
208 int
209 bus_dma_get_range_nb(void)
210 {
211 return (1);
212 }
213
214 void *
215 initarm(struct arm_boot_params *abp)
216 {
217 struct pv_addr kernel_l1pt;
218 int loop;
219 u_int l1pagetable;
220 vm_offset_t freemempos;
221 vm_offset_t afterkern;
222 vm_offset_t lastaddr;
223
224 int i;
225 uint32_t memsize;
226
227 boothowto = 0; /* Likely not needed */
228 lastaddr = parse_boot_param(abp);
229 i = 0;
230 set_cpufuncs();
231 cpufuncs.cf_sleep = s3c24x0_sleep;
232
233 pcpu0_init();
234
235 /* Do basic tuning, hz etc */
236 init_param1();
237
238 #define KERNEL_TEXT_BASE (KERNBASE)
239 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
240 /* Define a macro to simplify memory allocation */
241 #define valloc_pages(var, np) \
242 alloc_pages((var).pv_va, (np)); \
243 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
244
245 #define alloc_pages(var, np) \
246 (var) = freemempos; \
247 freemempos += (np * PAGE_SIZE); \
248 memset((char *)(var), 0, ((np) * PAGE_SIZE));
249
250 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
251 freemempos += PAGE_SIZE;
252 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
253 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
254 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
255 valloc_pages(kernel_pt_table[loop],
256 L2_TABLE_SIZE / PAGE_SIZE);
257 } else {
258 kernel_pt_table[loop].pv_va = freemempos -
259 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
260 L2_TABLE_SIZE_REAL;
261 kernel_pt_table[loop].pv_pa =
262 kernel_pt_table[loop].pv_va - KERNVIRTADDR +
263 KERNPHYSADDR;
264 }
265 }
266 /*
267 * Allocate a page for the system page mapped to V0x00000000
268 * This page will just contain the system vectors and can be
269 * shared by all processes.
270 */
271 valloc_pages(systempage, 1);
272
273 /* Allocate stacks for all modes */
274 valloc_pages(irqstack, IRQ_STACK_SIZE);
275 valloc_pages(abtstack, ABT_STACK_SIZE);
276 valloc_pages(undstack, UND_STACK_SIZE);
277 valloc_pages(kernelstack, KSTACK_PAGES);
278 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
279 /*
280 * Now we start construction of the L1 page table
281 * We start by mapping the L2 page tables into the L1.
282 * This means that we can replace L1 mappings later on if necessary
283 */
284 l1pagetable = kernel_l1pt.pv_va;
285
286 /* Map the L2 pages tables in the L1 page table */
287 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
288 &kernel_pt_table[KERNEL_PT_SYS]);
289 for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
290 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
291 &kernel_pt_table[KERNEL_PT_KERN + i]);
292 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
293 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
294 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
295 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
296 - 1));
297 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
298 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
299 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
300 }
301
302 /* Map the vector page. */
303 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
304 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
305 /* Map the stack pages */
306 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
307 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
308 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
309 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
310 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
311 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
312 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
313 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
314
315 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
316 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
317 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
318 msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
319
320
321 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
322 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
323 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
324 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
325 }
326
327 pmap_devmap_bootstrap(l1pagetable, s3c24x0_devmap);
328
329 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
330 setttb(kernel_l1pt.pv_pa);
331 cpu_tlb_flushID();
332 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
333
334 /*
335 * Pages were allocated during the secondary bootstrap for the
336 * stacks for different CPU modes.
337 * We must now set the r13 registers in the different CPU modes to
338 * point to these stacks.
339 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
340 * of the stack memory.
341 */
342
343 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
344 set_stackptrs(0);
345
346 /*
347 * We must now clean the cache again....
348 * Cleaning may be done by reading new data to displace any
349 * dirty data in the cache. This will have happened in setttb()
350 * but since we are boot strapping the addresses used for the read
351 * may have just been remapped and thus the cache could be out
352 * of sync. A re-clean after the switch will cure this.
353 * After booting there are no gross reloations of the kernel thus
354 * this problem will not occur after initarm().
355 */
356 cpu_idcache_wbinv_all();
357
358 /* Disable all peripheral interrupts */
359 ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0);
360 memsize = board_init();
361 /* Find pclk for uart */
362 switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) {
363 case 0x3241:
364 s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
365 &s3c2410_pclk);
366 break;
367 case 0x3244:
368 s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
369 &s3c2410_pclk);
370 break;
371 }
372 cninit();
373
374 /* Set stack for exception handlers */
375 data_abort_handler_address = (u_int)data_abort_handler;
376 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
377 undefined_handler_address = (u_int)undefinedinstruction_bounce;
378 undefined_init();
379
380 init_proc0(kernelstack.pv_va);
381
382 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
383
384 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1);
385 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0]));
386 vm_max_kernel_address = KERNVIRTADDR + 3 * memsize;
387 pmap_bootstrap(freemempos, &kernel_l1pt);
388 msgbufp = (void*)msgbufpv.pv_va;
389 msgbufinit(msgbufp, msgbufsize);
390 mutex_init();
391
392 physmem = memsize / PAGE_SIZE;
393
394 phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR;
395 phys_avail[1] = PHYSADDR + memsize;
396 phys_avail[2] = 0;
397 phys_avail[3] = 0;
398
399 init_param2(physmem);
400 kdb_init();
401
402 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
403 sizeof(struct pcb)));
404 }
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