s3c24x0_machdep.c

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    1 /*-
    2  * Copyright (c) 1994-1998 Mark Brinicombe.
    3  * Copyright (c) 1994 Brini.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software written for Brini by Mark Brinicombe
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Brini.
   19  * 4. The name of the company nor the name of the author may be used to
   20  *    endorse or promote products derived from this software without specific
   21  *    prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
   24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   26  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  *
   35  * RiscBSD kernel project
   36  *
   37  * machdep.c
   38  *
   39  * Machine dependant functions for kernel setup
   40  *
   41  * This file needs a lot of work. 
   42  *
   43  * Created      : 17/09/94
   44  */
   45 
   46 #include "opt_ddb.h"
   47 
   48 #include <sys/cdefs.h>
   49 __FBSDID("$FreeBSD: releng/9.1/sys/arm/s3c2xx0/s3c24x0_machdep.c 218913 2011-02-21 13:11:05Z cognet $");
   50 
   51 #define _ARM32_BUS_DMA_PRIVATE
   52 #include <sys/param.h>
   53 #include <sys/systm.h>
   54 #include <sys/sysproto.h>
   55 #include <sys/signalvar.h>
   56 #include <sys/imgact.h>
   57 #include <sys/kernel.h>
   58 #include <sys/ktr.h>
   59 #include <sys/linker.h>
   60 #include <sys/lock.h>
   61 #include <sys/malloc.h>
   62 #include <sys/mutex.h>
   63 #include <sys/pcpu.h>
   64 #include <sys/proc.h>
   65 #include <sys/ptrace.h>
   66 #include <sys/cons.h>
   67 #include <sys/bio.h>
   68 #include <sys/bus.h>
   69 #include <sys/buf.h>
   70 #include <sys/exec.h>
   71 #include <sys/kdb.h>
   72 #include <sys/msgbuf.h>
   73 #include <machine/reg.h>
   74 #include <machine/cpu.h>
   75 
   76 #include <vm/vm.h>
   77 #include <vm/pmap.h>
   78 #include <vm/vm_object.h>
   79 #include <vm/vm_page.h>
   80 #include <vm/vm_pager.h>
   81 #include <vm/vm_map.h>
   82 #include <vm/vnode_pager.h>
   83 #include <machine/pmap.h>
   84 #include <machine/vmparam.h>
   85 #include <machine/pcb.h>
   86 #include <machine/undefined.h>
   87 #include <machine/machdep.h>
   88 #include <machine/metadata.h>
   89 #include <machine/armreg.h>
   90 #include <machine/bus.h>
   91 #include <sys/reboot.h>
   92 
   93 #include <arm/s3c2xx0/s3c24x0var.h>
   94 #include <arm/s3c2xx0/s3c2410reg.h>
   95 #include <arm/s3c2xx0/s3c2xx0board.h>
   96 
   97 /* Page table for mapping proc0 zero page */
   98 #define KERNEL_PT_SYS           0
   99 #define KERNEL_PT_KERN          1       
  100 #define KERNEL_PT_KERN_NUM      44
  101 /* L2 table for mapping after kernel */
  102 #define KERNEL_PT_AFKERNEL      KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
  103 #define KERNEL_PT_AFKERNEL_NUM  5
  104 
  105 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
  106 #define NUM_KERNEL_PTS          (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
  107 
  108 /* Define various stack sizes in pages */
  109 #define IRQ_STACK_SIZE  1
  110 #define ABT_STACK_SIZE  1
  111 #define UND_STACK_SIZE  1
  112 
  113 extern int s3c2410_pclk;
  114 
  115 extern u_int data_abort_handler_address;
  116 extern u_int prefetch_abort_handler_address;
  117 extern u_int undefined_handler_address;
  118 
  119 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
  120 
  121 extern void *_end;
  122 
  123 extern int *end;
  124 
  125 struct pcpu __pcpu;
  126 struct pcpu *pcpup = &__pcpu;
  127 
  128 /* Physical and virtual addresses for some global pages */
  129 
  130 vm_paddr_t phys_avail[10];
  131 vm_paddr_t dump_avail[4];
  132 vm_offset_t physical_pages;
  133 
  134 struct pv_addr systempage;
  135 struct pv_addr msgbufpv;
  136 struct pv_addr irqstack;
  137 struct pv_addr undstack;
  138 struct pv_addr abtstack;
  139 struct pv_addr kernelstack;
  140 
  141 static struct trapframe proc0_tf;
  142 
  143 #define _A(a)   ((a) & ~L1_S_OFFSET)
  144 #define _S(s)   (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
  145 
  146 /* Static device mappings. */
  147 static const struct pmap_devmap s3c24x0_devmap[] = {
  148         /*
  149          * Map the devices we need early on.
  150          */
  151         {
  152                 _A(S3C24X0_CLKMAN_BASE),
  153                 _A(S3C24X0_CLKMAN_PA_BASE),
  154                 _S(S3C24X0_CLKMAN_SIZE),
  155                 VM_PROT_READ|VM_PROT_WRITE, 
  156                 PTE_NOCACHE,
  157         },
  158         {
  159                 _A(S3C24X0_GPIO_BASE),
  160                 _A(S3C24X0_GPIO_PA_BASE),
  161                 _S(S3C2410_GPIO_SIZE),
  162                 VM_PROT_READ|VM_PROT_WRITE,                             
  163                 PTE_NOCACHE,
  164         },
  165         {
  166                 _A(S3C24X0_INTCTL_BASE),
  167                 _A(S3C24X0_INTCTL_PA_BASE),
  168                 _S(S3C24X0_INTCTL_SIZE),
  169                 VM_PROT_READ|VM_PROT_WRITE, 
  170                 PTE_NOCACHE,
  171         },
  172         {
  173                 _A(S3C24X0_TIMER_BASE),
  174                 _A(S3C24X0_TIMER_PA_BASE),
  175                 _S(S3C24X0_TIMER_SIZE),
  176                 VM_PROT_READ|VM_PROT_WRITE,                             
  177                 PTE_NOCACHE,
  178         },
  179         {
  180                 _A(S3C24X0_UART0_BASE),
  181                 _A(S3C24X0_UART0_PA_BASE),
  182                 _S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE),
  183                 VM_PROT_READ|VM_PROT_WRITE,                             
  184                 PTE_NOCACHE,
  185         },
  186         {
  187                 _A(S3C24X0_WDT_BASE),
  188                 _A(S3C24X0_WDT_PA_BASE),
  189                 _S(S3C24X0_WDT_SIZE),
  190                 VM_PROT_READ|VM_PROT_WRITE,                             
  191                 PTE_NOCACHE,
  192         },
  193         {
  194                 0,
  195                 0,
  196                 0,
  197                 0,
  198                 0,
  199         }
  200 };
  201 
  202 #undef  _A
  203 #undef  _S
  204 
  205 #define ioreg_read32(a)         (*(volatile uint32_t *)(a))
  206 #define ioreg_write32(a,v)      (*(volatile uint32_t *)(a)=(v))
  207 
  208 #ifdef DDB
  209 extern vm_offset_t ksym_start, ksym_end;
  210 #endif
  211 
  212 struct arm32_dma_range s3c24x0_range = {
  213         .dr_sysbase = 0,
  214         .dr_busbase = 0,
  215         .dr_len = 0,
  216 };
  217 
  218 struct arm32_dma_range *
  219 bus_dma_get_range(void)
  220 {
  221 
  222         if (s3c24x0_range.dr_len == 0) {
  223                 s3c24x0_range.dr_sysbase = dump_avail[0];
  224                 s3c24x0_range.dr_busbase = dump_avail[0];
  225                 s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0];
  226         }
  227         return (&s3c24x0_range);
  228 }
  229 
  230 int
  231 bus_dma_get_range_nb(void)
  232 {
  233         return (1);
  234 }
  235 
  236 void *
  237 initarm(void *arg, void *arg2)
  238 {
  239         struct pv_addr  kernel_l1pt;
  240         int loop;
  241         u_int l1pagetable;
  242         vm_offset_t freemempos;
  243         vm_offset_t afterkern;
  244         vm_offset_t lastaddr;
  245 
  246         int i;
  247         uint32_t memsize;
  248 
  249         i = 0;
  250 
  251         boothowto = 0;
  252 
  253         set_cpufuncs();
  254         cpufuncs.cf_sleep = s3c24x0_sleep;
  255         lastaddr = fake_preload_metadata();
  256 
  257         pcpu_init(pcpup, 0, sizeof(struct pcpu));
  258         PCPU_SET(curthread, &thread0);
  259 
  260         /* Do basic tuning, hz etc */
  261         init_param1();
  262 
  263 #define KERNEL_TEXT_BASE (KERNBASE)
  264         freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
  265         /* Define a macro to simplify memory allocation */
  266 #define valloc_pages(var, np)                   \
  267         alloc_pages((var).pv_va, (np));         \
  268         (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
  269 
  270 #define alloc_pages(var, np)                    \
  271         (var) = freemempos;                     \
  272         freemempos += (np * PAGE_SIZE);         \
  273         memset((char *)(var), 0, ((np) * PAGE_SIZE));
  274 
  275         while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
  276                 freemempos += PAGE_SIZE;
  277         valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
  278         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  279                 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
  280                         valloc_pages(kernel_pt_table[loop],
  281                             L2_TABLE_SIZE / PAGE_SIZE);
  282                 } else {
  283                         kernel_pt_table[loop].pv_va = freemempos -
  284                             (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
  285                             L2_TABLE_SIZE_REAL;
  286                         kernel_pt_table[loop].pv_pa = 
  287                             kernel_pt_table[loop].pv_va - KERNVIRTADDR +
  288                             KERNPHYSADDR;
  289                 }
  290         }
  291         /*
  292          * Allocate a page for the system page mapped to V0x00000000
  293          * This page will just contain the system vectors and can be
  294          * shared by all processes.
  295          */
  296         valloc_pages(systempage, 1);
  297 
  298         /* Allocate stacks for all modes */
  299         valloc_pages(irqstack, IRQ_STACK_SIZE);
  300         valloc_pages(abtstack, ABT_STACK_SIZE);
  301         valloc_pages(undstack, UND_STACK_SIZE);
  302         valloc_pages(kernelstack, KSTACK_PAGES);
  303         valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
  304         /*
  305          * Now we start construction of the L1 page table
  306          * We start by mapping the L2 page tables into the L1.
  307          * This means that we can replace L1 mappings later on if necessary
  308          */
  309         l1pagetable = kernel_l1pt.pv_va;
  310 
  311         /* Map the L2 pages tables in the L1 page table */
  312         pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
  313             &kernel_pt_table[KERNEL_PT_SYS]);
  314         for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
  315                 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
  316                     &kernel_pt_table[KERNEL_PT_KERN + i]);
  317         pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
  318            (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
  319             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  320         afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 
  321             - 1));
  322         for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
  323                 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
  324                     &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
  325         }
  326 
  327         /* Map the vector page. */
  328         pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
  329             VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  330         /* Map the stack pages */
  331         pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
  332             IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  333         pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
  334             ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  335         pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
  336             UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  337         pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
  338             KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  339 
  340         pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
  341             L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  342         pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
  343             msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
  344 
  345 
  346         for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
  347                 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
  348                     kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
  349                     VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
  350         }
  351 
  352         pmap_devmap_bootstrap(l1pagetable, s3c24x0_devmap);
  353 
  354         cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
  355         setttb(kernel_l1pt.pv_pa);
  356         cpu_tlb_flushID();
  357         cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
  358 
  359         /*
  360          * Pages were allocated during the secondary bootstrap for the
  361          * stacks for different CPU modes.
  362          * We must now set the r13 registers in the different CPU modes to
  363          * point to these stacks.
  364          * Since the ARM stacks use STMFD etc. we must set r13 to the top end
  365          * of the stack memory.
  366          */
  367 
  368         cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
  369         set_stackptr(PSR_IRQ32_MODE,
  370             irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
  371         set_stackptr(PSR_ABT32_MODE,
  372             abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
  373         set_stackptr(PSR_UND32_MODE,
  374             undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
  375 
  376         /*
  377          * We must now clean the cache again....
  378          * Cleaning may be done by reading new data to displace any
  379          * dirty data in the cache. This will have happened in setttb()
  380          * but since we are boot strapping the addresses used for the read
  381          * may have just been remapped and thus the cache could be out
  382          * of sync. A re-clean after the switch will cure this.
  383          * After booting there are no gross reloations of the kernel thus
  384          * this problem will not occur after initarm().
  385          */
  386         cpu_idcache_wbinv_all();
  387 
  388         /* Disable all peripheral interrupts */
  389         ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0);
  390         memsize = board_init();
  391         /* Find pclk for uart */
  392         switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) {
  393         case 0x3241:
  394                 s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
  395                     &s3c2410_pclk);
  396                 break;
  397         case 0x3244:
  398                 s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
  399                     &s3c2410_pclk);
  400                 break;
  401         }
  402         cninit();
  403 
  404         /* Set stack for exception handlers */
  405         data_abort_handler_address = (u_int)data_abort_handler;
  406         prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
  407         undefined_handler_address = (u_int)undefinedinstruction_bounce;
  408         undefined_init();
  409                                 
  410         proc_linkup(&proc0, &thread0);
  411         thread0.td_kstack = kernelstack.pv_va;
  412         thread0.td_pcb = (struct pcb *)
  413                 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
  414         thread0.td_pcb->pcb_flags = 0;
  415         thread0.td_frame = &proc0_tf;
  416         pcpup->pc_curpcb = thread0.td_pcb;
  417         
  418         arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
  419 
  420         pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1);
  421         /*
  422          * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
  423          * calling pmap_bootstrap.
  424          */
  425         dump_avail[0] = PHYSADDR;
  426         dump_avail[1] = PHYSADDR + memsize;
  427         dump_avail[2] = 0;
  428         dump_avail[3] = 0;
  429                                         
  430         pmap_bootstrap(freemempos,
  431             KERNVIRTADDR + 3 * memsize,
  432             &kernel_l1pt);
  433         msgbufp = (void*)msgbufpv.pv_va;
  434         msgbufinit(msgbufp, msgbufsize);
  435         mutex_init();
  436 
  437         physmem = memsize / PAGE_SIZE;
  438 
  439         phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR;
  440         phys_avail[1] = PHYSADDR + memsize;
  441         phys_avail[2] = 0;
  442         phys_avail[3] = 0;
  443 
  444         init_param2(physmem);
  445         kdb_init();
  446 
  447         return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
  448             sizeof(struct pcb)));
  449 }
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FreeBSD/Linux Kernel Cross Reference sys/arm/s3c2xx0/s3c24x0_machdep.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/s3c2xx0/s3c24x0_machdep.c
