The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/sa11x0/sa11x0_io_asm.S

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    1 /*      $NetBSD: sa11x0_io_asm.S,v 1.1 2001/07/08 23:37:53 rjs Exp $    */
    2 
    3 /*-
    4  * Copyright (c) 1997 Mark Brinicombe.
    5  * Copyright (c) 1997 Causality Limited.
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Mark Brinicombe.
   19  * 4. The name of the company nor the name of the author may be used to
   20  *    endorse or promote products derived from this software without specific
   21  *    prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
   24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   26  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  *
   35  */
   36 
   37 #include <machine/asm.h>
   38 __FBSDID("$FreeBSD: releng/10.0/sys/arm/sa11x0/sa11x0_io_asm.S 236990 2012-06-13 04:59:00Z imp $");
   39 
   40 /*
   41  * bus_space I/O functions for sa11x0
   42  */
   43 
   44 /*
   45  * read single
   46  */
   47 
   48 ENTRY(sa11x0_bs_r_1)
   49         ldrb    r0, [r1, r2]
   50         mov     pc, lr
   51 
   52 ENTRY(sa11x0_bs_r_2)
   53         ldrh    r0, [r1, r2]
   54         mov     pc, lr
   55 
   56 ENTRY(sa11x0_bs_r_4)
   57         ldr     r0, [r1, r2]
   58         mov     pc, lr
   59 
   60 /*
   61  * write single
   62  */
   63 
   64 ENTRY(sa11x0_bs_w_1)
   65         strb    r3, [r1, r2]
   66         mov     pc, lr
   67 
   68 ENTRY(sa11x0_bs_w_2)
   69         strh    r3, [r1, r2]
   70         mov     pc, lr
   71 
   72 ENTRY(sa11x0_bs_w_4)
   73         str     r3, [r1, r2]
   74         mov     pc, lr
   75 
   76 
   77 /*
   78  * read multiple
   79  */
   80 
   81 ENTRY(sa11x0_bs_rm_1)
   82         add     r0, r1, r2
   83         ldr     r2, [sp, #0]
   84         cmp     r2, #0x00000000
   85         movle   pc, lr
   86 
   87 sa11x0_bs_rm_1_loop:
   88         ldrb    r1, [r0]
   89         subs    r2, r2, #0x00000001
   90         strb    r1, [r3], #0x0001
   91         bgt     sa11x0_bs_rm_1_loop
   92 
   93         mov     pc, lr
   94 
   95 ENTRY(sa11x0_bs_rm_2)
   96         add     r0, r1, r2
   97         ldr     r2, [sp, #0]
   98         cmp     r2, #0x00000000
   99         movle   pc, lr
  100 
  101         tst     r2, #0x00000007
  102         tsteq   r3, #0x00000003
  103         beq     sa11x0_bs_rm_2_fast
  104 
  105 sa11x0_bs_rm_2_loop:
  106         ldrh    r1, [r0]
  107         subs    r2, r2, #0x00000001
  108         strh    r1, [r3], #0x0002
  109         bgt     sa11x0_bs_rm_2_loop
  110 
  111         mov     pc, lr
  112 
  113 sa11x0_bs_rm_2_fast:
  114         stmfd   sp!, {r4, r5, lr}
  115 
  116 sa11x0_bs_rm_2_fastloop:
  117         ldrh    r1, [r0]
  118         ldrh    lr, [r0]
  119         orr     r1, r1, lr, lsl #16
  120 
  121         ldrh    r4, [r0]
  122         ldrh    lr, [r0]
  123         orr     r4, r4, lr, lsl #16
  124 
  125         ldrh    r5, [r0]
  126         ldrh    lr, [r0]
  127         orr     r5, r5, lr, lsl #16
  128 
  129         ldrh    ip, [r0]
  130         ldrh    lr, [r0]
  131         orr     ip, ip, lr, lsl #16
  132 
  133         stmia   r3!, {r1, r4, r5, ip}
  134         subs    r2, r2, #8
  135         bgt     sa11x0_bs_rm_2_fastloop
  136 
  137         ldmfd   sp!, {r4, r5, pc}
  138 
  139 
  140 ENTRY(sa11x0_bs_rm_4)
  141         add     r0, r1, r2
  142         ldr     r2, [sp, #0]
  143         cmp     r2, #0x00000000
  144         movle   pc, lr
  145 
  146 sa11x0_bs_rm_4_loop:
  147         ldr     r1, [r0]
  148         subs    r2, r2, #0x00000001
  149         str     r1, [r3], #0x0004
  150         bgt     sa11x0_bs_rm_4_loop
  151 
  152         mov     pc, lr
  153 
  154 /*
  155  * write multiple
  156  */
  157 
  158 ENTRY(sa11x0_bs_wm_1)
  159         add     r0, r1, r2
  160         ldr     r2, [sp, #0]
  161         cmp     r2, #0x00000000
  162         movle   pc, lr
  163 
  164 sa11x0_wm_1_loop:
  165         ldrb    r1, [r3], #0x0001
  166         subs    r2, r2, #0x00000001
  167         strb    r1, [r0]
  168         bgt     sa11x0_wm_1_loop
  169 
  170         mov     pc, lr
  171 
  172 ENTRY(sa11x0_bs_wm_2)
  173         add     r0, r1, r2
  174         ldr     r2, [sp, #0]
  175         cmp     r2, #0x00000000
  176         movle   pc, lr
  177 
  178 sa11x0_bs_wm_2_loop:
  179         ldrh    r1, [r3], #0x0002
  180         subs    r2, r2, #0x00000001
  181         strh    r1, [r0]
  182         bgt     sa11x0_bs_wm_2_loop
  183 
  184         mov     pc, lr
  185 
  186 ENTRY(sa11x0_bs_wm_4)
  187         add     r0, r1, r2
  188         ldr     r2, [sp, #0]
  189         cmp     r2, #0x00000000
  190         movle   pc, lr
  191 
  192 sa11x0_bs_wm_4_loop:
  193         ldr     r1, [r3], #0x0004
  194         subs    r2, r2, #0x00000001
  195         str     r1, [r0]
  196         bgt     sa11x0_bs_wm_4_loop
  197 
  198         mov     pc, lr
  199 
  200 /*
  201  * read region
  202  */
  203 
  204 ENTRY(sa11x0_bs_rr_2)
  205         add     r0, r1, r2
  206         ldr     r2, [sp, #0]
  207         cmp     r2, #0x00000000
  208         movle   pc, lr
  209 
  210 sa11x0_bs_rr_2_loop:
  211         ldrh    r1, [r0], #0x0002
  212         strh    r1, [r3], #0x0002
  213         subs    r2, r2, #0x00000001
  214         bgt     sa11x0_bs_rr_2_loop
  215 
  216         mov     pc, lr
  217 
  218 /*
  219  * write region
  220  */
  221 
  222 ENTRY(sa11x0_bs_wr_2)
  223         add     r0, r1, r2
  224         ldr     r2, [sp, #0]
  225         cmp     r2, #0x00000000
  226         movle   pc, lr
  227 
  228 sa11x0_bs_wr_2_loop:
  229         ldrh    r1, [r3], #0x0002
  230         strh    r1, [r0], #0x0002
  231         subs    r2, r2, #0x00000001
  232         bgt     sa11x0_bs_wr_2_loop
  233 
  234         mov     pc, lr
  235 
  236 /*
  237  * set regiuon
  238  */
  239 
  240 ENTRY(sa11x0_bs_sr_2)
  241         add     r0, r1, r2
  242         ldr     r2, [sp, #0]
  243         cmp     r2, #0x00000000
  244         movle   pc, lr
  245 
  246 sa11x0_bs_sr_2_loop:
  247         strh    r3, [r0], #0x0002
  248         subs    r2, r2, #0x00000001
  249         bgt     sa11x0_bs_sr_2_loop
  250 
  251         mov     pc, lr
  252 
  253 /*
  254  * copy region
  255  */
  256 
  257 ENTRY(sa11x0_bs_c_2)
  258         add     r0, r1, r2
  259         ldr     r2, [sp, #0]
  260         add     r1, r2, r3
  261         ldr     r2, [sp, #4]
  262         cmp     r2, #0x00000000
  263         movle   pc, lr
  264 
  265         cmp     r0, r1
  266         blt     sa11x0_bs_c_2_backwards
  267 
  268 sa11x0_bs_cf_2_loop:
  269         ldrh    r3, [r0], #0x0002
  270         strh    r3, [r1], #0x0002
  271         subs    r2, r2, #0x00000001
  272         bgt     sa11x0_bs_cf_2_loop
  273 
  274         mov     pc, lr
  275 
  276 sa11x0_bs_c_2_backwards:
  277         add     r0, r0, r2, lsl #1
  278         add     r1, r1, r2, lsl #1
  279         sub     r0, r0, #2
  280         sub     r1, r1, #2
  281 
  282 sa11x0_bs_cb_2_loop:
  283         ldrh    r3, [r0], #-2
  284         strh    r3, [r1], #-2
  285         subs    r2, r2, #1
  286         bne     sa11x0_bs_cb_2_loop
  287 
  288         mov     pc, lr
  289 
  290 /* end of sa11x0_io_asm.S */

Cache object: 87ac10475183939f2b931c8c1206bcc1


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