The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/sa11x0/sa11x0_irq.S

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    1 /*      $NetBSD: sa11x0_irq.S,v 1.5 2003/03/31 19:52:35 chris Exp $     */
    2 
    3 /*-
    4  * Copyright (c) 1998 Mark Brinicombe.
    5  * Copyright (c) 1998 Causality Limited
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to the NetBSD Foundation
    9  * by IWAMOTO Toshihiro.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
   21  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   22  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   23  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   24  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   25  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  *
   32  */
   33 
   34 #include "assym.s"
   35 #include <machine/asm.h>
   36 #include <machine/armreg.h>
   37 #include <machine/asmacros.h>
   38 #include <arm/sa11x0/sa11x0_reg.h>
   39 __FBSDID("$FreeBSD: releng/9.0/sys/arm/sa11x0/sa11x0_irq.S 224612 2011-08-02 17:49:27Z attilio $");
   40 Lcurrent_intr_depth:
   41         .word   _C_LABEL(current_intr_depth)
   42 
   43         .globl  _C_LABEL(saipic_base)
   44 _C_LABEL(saipic_base):
   45         .word   0x00000000
   46 
   47 #ifdef INTR_DEBUG
   48 Ldbg_str:
   49         .asciz  "irq_entry %x %x\n"
   50 #endif
   51 
   52 AST_LOCALS
   53 /*
   54  * Regsister usage
   55  *
   56  *  r6  - Address of current handler
   57  *  r7  - Pointer to handler pointer list
   58  *  r8  - Current IRQ requests.
   59  *  r9  - Used to count through possible IRQ bits.
   60  *  r10 - Base address of SAIP
   61  */
   62 
   63 ASENTRY_NP(irq_entry)
   64         sub     lr, lr, #0x00000004     /* Adjust the lr */
   65 
   66         PUSHFRAMEINSVC                  /* Push an interrupt frame */
   67 
   68         /* Load r8 with the SAIPIC interrupt requests */
   69 
   70         ldr     r10, _C_LABEL(saipic_base)
   71         ldr     r8, [r10, #(SAIPIC_IP)] /* Load IRQ pending register */
   72 
   73 #ifdef INTR_DEBUG
   74         ldr     r2, [r10, #(SAIPIC_MR)]
   75         adr     r0, Ldbg_str
   76         mov     r1, r8
   77         bl      _C_LABEL(printf)
   78 #endif
   79         /*
   80          * Note that we have entered the IRQ handler.
   81          * We are in SVC mode so we cannot use the processor mode
   82          * to determine if we are in an IRQ. Instead we will count the
   83          * each time the interrupt handler is nested.
   84          */
   85 
   86         ldr     r0, Lcurrent_intr_depth
   87         ldr     r1, [r0]
   88         add     r1, r1, #1
   89         str     r1, [r0]
   90 
   91         mov     r0, sp
   92         mov     r1, r8
   93         bl      _C_LABEL(arm_handler_execute)
   94 
   95 #ifdef INTR_DEBUG
   96         adr     r0, Ldbg_str
   97         mov     r1, #3
   98         ldr     r2, [r10, #(SAIPIC_MR)]
   99         bl      _C_LABEL(printf)
  100 #endif
  101 
  102         /* Decrement the nest count */
  103         ldr     r0, Lcurrent_intr_depth
  104         ldr     r1, [r0]
  105         sub     r1, r1, #1
  106         str     r1, [r0]
  107 
  108         DO_AST
  109         PULLFRAMEFROMSVCANDEXIT
  110 
  111         /* NOT REACHED */
  112         b       . - 8
  113 Lcnt:
  114         .word   _C_LABEL(cnt)
  115 
  116 ENTRY(sa11x0_activateirqs)
  117         ldr     r0, _C_LABEL(saipic_base)
  118         mov     r1, #0xffffffff
  119         str     r1, [r0, #(SAIPIC_MR)]
  120         mov     pc, lr
  121 
  122         .global _C_LABEL(intrnames), _C_LABEL(sintrnames)
  123 _C_LABEL(intrnames): 
  124 _C_LABEL(sintrnames):
  125         .int    0
  126 
  127         .globl  _C_LABEL(intrcnt), _C_LABEL(sintrcnt)
  128 
  129 _C_LABEL(intrcnt):
  130         .space  ICU_LEN*4  /* XXX Should be linked to number of interrupts */
  131 
  132 _C_LABEL(sintrcnt):
  133         .word   ICU_LEN*4

Cache object: 99511bd913e384e8580104c9760f84d1


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