1 /* $NetBSD: sa11x0_ostreg.h,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 *
30 * $FreeBSD: releng/9.0/sys/arm/sa11x0/sa11x0_ostreg.h 203974 2010-02-16 21:59:17Z imp $
31 *
32 */
33
34 /*
35 * SA-11x0 OS Timer Register
36 */
37
38 /* OS Timer Match Register */
39 #define SAOST_MR0 0x00
40 #define SAOST_MR1 0x04
41 #define SAOST_MR2 0x08
42 #define SAOST_MR3 0x0C
43
44 /* OS Timer Count Register */
45 #define SAOST_CR 0x10
46
47 /* OS Timer Status Register */
48 #define SAOST_SR 0x14
49 #define SR_CH0 (1<<0)
50 #define SR_CH1 (1<<1)
51 #define SR_CH2 (1<<2)
52 #define SR_CH3 (1<<3)
53
54 /* OS Timer Watchdog Match Enable Register */
55 #define SAOST_WR 0x18
56
57 /* OS Timer Interrupt Enable Register */
58 #define SAOST_IR 0x1C
59
60 /*
61 * SA-1110 Real Time Clock
62 */
63
64 /* RTC Alarm Register */
65 #define SARTC_AR 0x00
66
67 /* RTC Counter Register */
68 #define SARTC_CR 0x04
69
70 /* RTC Trim Register */
71 #define SARTC_TR 0x08
72
73 /* RTC Status Register */
74 #define SARTC_SR 0x0C
75
76 /* end of sa11x0_ostreg.h */
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