The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/sa11x0/uart_dev_sa1110.c

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    1 /*-
    2  * Copyright (c) 2003 Marcel Moolenaar
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  *
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/6.0/sys/arm/sa11x0/uart_dev_sa1110.c 139735 2005-01-05 21:58:49Z imp $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/conf.h>
   34 #include <sys/cons.h>
   35 #include <sys/tty.h>
   36 #include <machine/bus.h>
   37 
   38 #include <dev/uart/uart.h>
   39 #include <dev/uart/uart_cpu.h>
   40 #include <dev/uart/uart_bus.h>
   41 #include <arm/sa11x0/uart_dev_sa1110.h>
   42 
   43 #include "uart_if.h"
   44 
   45 #define      DEFAULT_RCLK    3686400
   46 
   47 extern int got_mmu;
   48 
   49 /*
   50  * Low-level UART interface.
   51  */
   52 static int sa1110_probe(struct uart_bas *bas);
   53 static void sa1110_init(struct uart_bas *bas, int, int, int, int);
   54 static void sa1110_term(struct uart_bas *bas);
   55 static void sa1110_putc(struct uart_bas *bas, int);
   56 static int sa1110_poll(struct uart_bas *bas);
   57 static int sa1110_getc(struct uart_bas *bas);
   58 
   59 int did_mmu = 0;
   60 
   61 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
   62 
   63 struct uart_ops uart_sa1110_ops = {
   64         .probe = sa1110_probe,
   65         .init = sa1110_init,
   66         .term = sa1110_term,
   67         .putc = sa1110_putc,
   68         .poll = sa1110_poll,
   69         .getc = sa1110_getc,
   70 };
   71 
   72 static int
   73 sa1110_probe(struct uart_bas *bas)
   74 {
   75         return (0);
   76 }
   77 
   78 static void
   79 sa1110_addr_change(struct uart_bas *bas)
   80 {
   81         
   82         bas->bsh = 0xd000d000;
   83         did_mmu = 1;
   84 }
   85 
   86 static void
   87 sa1110_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
   88     int parity)
   89 {
   90         int brd;
   91         
   92         /* XXX: sigh. */
   93         if (!did_mmu && got_mmu) 
   94                 sa1110_addr_change(bas);
   95         if (bas->rclk == 0)
   96                 bas->rclk = DEFAULT_RCLK;
   97         while (uart_getreg(bas, SACOM_SR1) & SR1_TBY);
   98         uart_setreg(bas, SACOM_CR3, 0);
   99         brd = SACOMSPEED(baudrate);
  100         uart_setreg(bas, SACOM_CR1, brd >> 8);
  101         uart_setreg(bas, SACOM_CR2, brd & 0xff);
  102         uart_setreg(bas, SACOM_CR3, CR3_RXE | CR3_TXE);
  103 }
  104 
  105 static void
  106 sa1110_term(struct uart_bas *bas)
  107 {
  108         /* XXX */
  109 }
  110 
  111 static void
  112 sa1110_putc(struct uart_bas *bas, int c)
  113 {
  114         /* XXX: sigh. */
  115         if (!did_mmu && got_mmu) 
  116                 sa1110_addr_change(bas);
  117 
  118         while (!uart_getreg(bas, SACOM_SR1) & SR1_TNF);
  119         uart_setreg(bas, SACOM_DR, c);
  120 }
  121 
  122 static int
  123 sa1110_poll(struct uart_bas *bas)
  124 {
  125         /* XXX: sigh. */
  126         if (!did_mmu && got_mmu) 
  127                 sa1110_addr_change(bas);
  128 
  129         if (!(uart_getreg(bas, SACOM_SR1) & SR1_RNE))
  130                 return (-1);
  131         return (uart_getreg(bas, SACOM_DR) & 0xff);
  132 }
  133 
  134 static int
  135 sa1110_getc(struct uart_bas *bas)
  136 {
  137         int c;
  138         /* XXX: sigh. */
  139         if (!did_mmu && got_mmu) 
  140                 sa1110_addr_change(bas);
  141 
  142         while (!(uart_getreg(bas, SACOM_SR1) & SR1_RNE)) {
  143                 u_int32_t sr0;
  144 
  145                 sr0 = uart_getreg(bas, SACOM_SR0);
  146                 if (ISSET(sr0, SR0_RBB))
  147                         uart_setreg(bas, SACOM_SR0, SR0_RBB);
  148                 if (ISSET(sr0, SR0_REB))
  149                         uart_setreg(bas, SACOM_SR0, SR0_REB);
  150         }
  151         c = uart_getreg(bas, SACOM_DR);
  152         c &= 0xff;
  153         return (c);
  154 }
  155 
  156 static int sa1110_bus_probe(struct uart_softc *sc);
  157 static int sa1110_bus_attach(struct uart_softc *sc);
  158 static int sa1110_bus_flush(struct uart_softc *, int);
  159 static int sa1110_bus_getsig(struct uart_softc *);
  160 static int sa1110_bus_ioctl(struct uart_softc *, int, intptr_t);
  161 static int sa1110_bus_ipend(struct uart_softc *);
  162 static int sa1110_bus_param(struct uart_softc *, int, int, int, int);
  163 static int sa1110_bus_receive(struct uart_softc *);
  164 static int sa1110_bus_setsig(struct uart_softc *, int);
  165 static int sa1110_bus_transmit(struct uart_softc *);
  166 
  167 static kobj_method_t sa1110_methods[] = {
  168         KOBJMETHOD(uart_probe,          sa1110_bus_probe),
  169         KOBJMETHOD(uart_attach,         sa1110_bus_attach),
  170         KOBJMETHOD(uart_flush,          sa1110_bus_flush),
  171         KOBJMETHOD(uart_getsig,         sa1110_bus_getsig),
  172         KOBJMETHOD(uart_ioctl,          sa1110_bus_ioctl),
  173         KOBJMETHOD(uart_ipend,          sa1110_bus_ipend),
  174         KOBJMETHOD(uart_param,          sa1110_bus_param),
  175         KOBJMETHOD(uart_receive,        sa1110_bus_receive),
  176         KOBJMETHOD(uart_setsig,         sa1110_bus_setsig),
  177         KOBJMETHOD(uart_transmit,       sa1110_bus_transmit),
  178         
  179         {0, 0 }
  180 };
  181 
  182 int
  183 sa1110_bus_probe(struct uart_softc *sc)
  184 {
  185         return (0);
  186 }
  187 
  188 static int
  189 sa1110_bus_attach(struct uart_softc *sc)
  190 {
  191          bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
  192 
  193          sc->sc_txfifosz = 3;
  194          sc->sc_rxfifosz = 1;
  195          sc->sc_hwiflow = 0;
  196          uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE);
  197         return (0);
  198 }
  199 static int
  200 sa1110_bus_transmit(struct uart_softc *sc)
  201 {
  202         int i;
  203 #if 0
  204         int sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
  205 
  206         while (!(uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_TIE))
  207                 uart_setreg(&sc->sc_bas, SACOM_CR3,
  208                     uart_getreg(&sc->sc_bas, SACOM_CR3) | CR3_TIE);    
  209 #endif
  210 
  211         sc->sc_txbusy = 1;
  212         uart_setreg(&sc->sc_bas, SACOM_CR3, uart_getreg(&sc->sc_bas, SACOM_CR3)
  213             | CR3_TIE);    
  214         for (i = 0; i < sc->sc_txdatasz; i++) {
  215                 while (!uart_getreg(&sc->sc_bas, SACOM_SR1) & SR1_TNF);
  216 
  217                 uart_setreg(&sc->sc_bas, SACOM_DR, sc->sc_txbuf[i]);
  218                 uart_barrier(&sc->sc_bas);
  219         }
  220 #if 0
  221         sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
  222 #endif
  223 
  224         return (0);
  225 }
  226 static int
  227 sa1110_bus_setsig(struct uart_softc *sc, int sig)
  228 {
  229         return (0);
  230 }
  231 static int
  232 sa1110_bus_receive(struct uart_softc *sc)
  233 {
  234         
  235 #if 0
  236         while (!(uart_getreg(&sc->sc_bas, SACOM_SR1) & SR1_RNE)) {
  237                 u_int32_t sr0;
  238 
  239                 sr0 = uart_getreg(&sc->sc_bas, SACOM_SR0);
  240                 if (ISSET(sr0, SR0_RBB))
  241                         uart_setreg(&sc->sc_bas, SACOM_SR0, SR0_RBB);
  242                 if (ISSET(sr0, SR0_REB))
  243                         uart_setreg(&sc->sc_bas, SACOM_SR0, SR0_REB);
  244         }
  245 #endif
  246         
  247         uart_setreg(&sc->sc_bas, SACOM_CR3, uart_getreg(&sc->sc_bas, SACOM_CR3)
  248             | CR3_RIE);
  249         uart_rx_put(sc, uart_getreg(&sc->sc_bas, SACOM_DR));
  250         return (0);
  251 }
  252 static int
  253 sa1110_bus_param(struct uart_softc *sc, int baudrate, int databits,
  254     int stopbits, int parity)
  255 {
  256         int brd;
  257         
  258         if (baudrate > 0) {
  259                 brd = SACOMSPEED(baudrate);
  260                 uart_setreg(&sc->sc_bas, SACOM_CR1, brd >> 8);
  261                 uart_setreg(&sc->sc_bas, SACOM_CR2, brd & 0xff);
  262         }
  263         return (0);
  264 }
  265 static int
  266 sa1110_bus_ipend(struct uart_softc *sc)
  267 {
  268         int sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
  269         int ipend = 0;
  270         int mask = CR3_RIE | CR3_TIE;
  271         if (sr & 1) {
  272                 if (uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_TIE)
  273                         ipend |= UART_IPEND_TXIDLE;
  274                 mask &= ~CR3_TIE;
  275         }
  276         if (sr & 4) {
  277                 if (uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_RIE)
  278                         ipend |= UART_IPEND_RXREADY;
  279                 mask &= ~CR3_RIE;
  280         }
  281         uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | mask); 
  282         return (ipend);
  283 }
  284 static int
  285 sa1110_bus_flush(struct uart_softc *sc, int what)
  286 {
  287         return (0);
  288 }
  289 
  290 static int
  291 sa1110_bus_getsig(struct uart_softc *sc)
  292 {
  293         return (0);
  294 }
  295 
  296 static int
  297 sa1110_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
  298 {
  299         return (EINVAL);
  300 }
  301 struct uart_class uart_sa1110_class = {
  302         "sa1110 class",
  303         sa1110_methods,
  304         1,
  305         .uc_range = 8,
  306         .uc_rclk = 3686400
  307 };

Cache object: 0942db9af57b93d22c4fb92f5451ed6b


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