1 /*-
2 * Copyright (c) 2011 Damjan Marion.
3 * Copyright (c) 1994-1998 Mark Brinicombe.
4 * Copyright (c) 1994 Brini.
5 * All rights reserved.
6 *
7 * This code is derived from software written for Brini by Mark Brinicombe
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * from: FreeBSD: //depot/projects/arm/src/sys/arm/mv/mv_machdep.c
31 */
32
33 #include "opt_ddb.h"
34 #include "opt_platform.h"
35
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD: releng/10.1/sys/arm/tegra/tegra2_machdep.c 266084 2014-05-14 19:18:58Z ian $");
38
39 #define _ARM32_BUS_DMA_PRIVATE
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/bus.h>
43
44 #include <vm/vm.h>
45 #include <vm/pmap.h>
46
47 #include <machine/bus.h>
48 #include <machine/devmap.h>
49 #include <machine/machdep.h>
50
51 #include <dev/fdt/fdt_common.h>
52
53 #define TEGRA2_CLK_RST_PA_BASE 0x60006000
54
55 #define TEGRA2_CLK_RST_OSC_FREQ_DET_REG 0x58
56 #define TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG 0x5C
57 #define OSC_FREQ_DET_TRIG (1U<<31)
58 #define OSC_FREQ_DET_BUSY (1U<<31)
59
60 #if 0
61 static int
62 tegra2_osc_freq_detect(void)
63 {
64 bus_space_handle_t bsh;
65 uint32_t c;
66 uint32_t r=0;
67 int i=0;
68
69 struct {
70 uint32_t val;
71 uint32_t freq;
72 } freq_det_cnts[] = {
73 { 732, 12000000 },
74 { 794, 13000000 },
75 {1172, 19200000 },
76 {1587, 26000000 },
77 { -1, 0 },
78 };
79
80 printf("Measuring...\n");
81 bus_space_map(fdtbus_bs_tag,TEGRA2_CLK_RST_PA_BASE, 0x1000, 0, &bsh);
82
83 bus_space_write_4(fdtbus_bs_tag, bsh, TEGRA2_CLK_RST_OSC_FREQ_DET_REG,
84 OSC_FREQ_DET_TRIG | 1 );
85 do {} while (bus_space_read_4(fdtbus_bs_tag, bsh,
86 TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG) & OSC_FREQ_DET_BUSY);
87
88 c = bus_space_read_4(fdtbus_bs_tag, bsh, TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG);
89
90 while (freq_det_cnts[i].val > 0) {
91 if (((freq_det_cnts[i].val - 3) < c) && (c < (freq_det_cnts[i].val + 3)))
92 r = freq_det_cnts[i].freq;
93 i++;
94 }
95 printf("c=%u r=%u\n",c,r );
96 bus_space_free(fdtbus_bs_tag, bsh, 0x1000);
97 return r;
98 }
99 #endif
100
101 vm_offset_t
102 initarm_lastaddr(void)
103 {
104
105 return (arm_devmap_lastaddr());
106 }
107
108 void
109 initarm_early_init(void)
110 {
111 }
112
113 void
114 initarm_gpio_init(void)
115 {
116 }
117
118 void
119 initarm_late_init(void)
120 {
121 }
122
123 /*
124 * Add a static mapping for the register range that includes the debug uart.
125 * It's not clear this is needed, but the original code established this mapping
126 * before conversion to the newer arm_devmap_add_entry() routine.
127 */
128 int
129 initarm_devmap_init(void)
130 {
131
132 arm_devmap_add_entry(0x70000000, 0x00100000);
133 return (0);
134 }
135
136 struct arm32_dma_range *
137 bus_dma_get_range(void)
138 {
139
140 return (NULL);
141 }
142
143 int
144 bus_dma_get_range_nb(void)
145 {
146
147 return (0);
148 }
149
Cache object: 8ec388ee24da81619af69753dbdb1934
|