am335x_musb.c

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    1 /*-
    2  * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  */
   25 
   26 #include <sys/cdefs.h>
   27 __FBSDID("$FreeBSD$");
   28 
   29 #include <sys/stdint.h>
   30 #include <sys/stddef.h>
   31 #include <sys/param.h>
   32 #include <sys/queue.h>
   33 #include <sys/types.h>
   34 #include <sys/systm.h>
   35 #include <sys/kernel.h>
   36 #include <sys/bus.h>
   37 #include <sys/module.h>
   38 #include <sys/lock.h>
   39 #include <sys/mutex.h>
   40 #include <sys/condvar.h>
   41 #include <sys/sysctl.h>
   42 #include <sys/sx.h>
   43 #include <sys/unistd.h>
   44 #include <sys/callout.h>
   45 #include <sys/malloc.h>
   46 #include <sys/priv.h>
   47 
   48 #include <dev/ofw/openfirm.h>
   49 #include <dev/ofw/ofw_bus.h>
   50 #include <dev/ofw/ofw_bus_subr.h>
   51 
   52 #include <dev/usb/usb.h>
   53 #include <dev/usb/usbdi.h>
   54 
   55 #include <dev/usb/usb_core.h>
   56 #include <dev/usb/usb_busdma.h>
   57 #include <dev/usb/usb_process.h>
   58 #include <dev/usb/usb_util.h>
   59 
   60 #define USB_DEBUG_VAR usbssdebug
   61 
   62 #include <dev/usb/usb_controller.h>
   63 #include <dev/usb/usb_bus.h>
   64 #include <dev/usb/controller/musb_otg.h>
   65 #include <dev/usb/usb_debug.h>
   66 
   67 #include <sys/rman.h>
   68 
   69 #include <arm/ti/am335x/am335x_scm.h>
   70 #include <arm/ti/ti_sysc.h>
   71 #include <dev/extres/clk/clk.h>
   72 #include <dev/extres/syscon/syscon.h>
   73 #include "syscon_if.h"
   74 
   75 #define USBCTRL_REV             0x00
   76 #define USBCTRL_CTRL            0x14
   77 #define USBCTRL_STAT            0x18
   78 #define USBCTRL_IRQ_STAT0       0x30
   79 #define         IRQ_STAT0_RXSHIFT       16
   80 #define         IRQ_STAT0_TXSHIFT       0
   81 #define USBCTRL_IRQ_STAT1       0x34
   82 #define         IRQ_STAT1_DRVVBUS       (1 << 8)
   83 #define USBCTRL_INTEN_SET0      0x38
   84 #define USBCTRL_INTEN_SET1      0x3C
   85 #define         USBCTRL_INTEN_USB_ALL   0x1ff
   86 #define         USBCTRL_INTEN_USB_SOF   (1 << 3)
   87 #define USBCTRL_INTEN_CLR0      0x40
   88 #define USBCTRL_INTEN_CLR1      0x44
   89 #define USBCTRL_UTMI            0xE0
   90 #define         USBCTRL_UTMI_FSDATAEXT          (1 << 1)
   91 #define USBCTRL_MODE            0xE8
   92 #define         USBCTRL_MODE_IDDIG              (1 << 8)
   93 #define         USBCTRL_MODE_IDDIGMUX           (1 << 7)
   94 
   95 /* USBSS resource + 2 MUSB ports */
   96 
   97 #define RES_USBCORE     0
   98 #define RES_USBCTRL     1
   99 
  100 #define USB_WRITE4(sc, idx, reg, val)   do {            \
  101         bus_write_4((sc)->sc_mem_res[idx], (reg), (val));       \
  102 } while (0)
  103 
  104 #define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg))
  105 
  106 #define USBCTRL_WRITE4(sc, reg, val)    \
  107     USB_WRITE4((sc), RES_USBCTRL, (reg), (val))
  108 #define USBCTRL_READ4(sc, reg)          \
  109     USB_READ4((sc), RES_USBCTRL, (reg))
  110 
  111 static struct resource_spec am335x_musbotg_mem_spec[] = {
  112         { SYS_RES_MEMORY,   0,  RF_ACTIVE },
  113         { SYS_RES_MEMORY,   1,  RF_ACTIVE },
  114         { -1,               0,  0 }
  115 };
  116 
  117 #ifdef USB_DEBUG
  118 static int usbssdebug = 0;
  119 
  120 static SYSCTL_NODE(_hw_usb, OID_AUTO, am335x_usbss,
  121     CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
  122     "AM335x USBSS");
  123 SYSCTL_INT(_hw_usb_am335x_usbss, OID_AUTO, debug, CTLFLAG_RW,
  124     &usbssdebug, 0, "Debug level");
  125 #endif
  126 
  127 static device_probe_t musbotg_probe;
  128 static device_attach_t musbotg_attach;
  129 static device_detach_t musbotg_detach;
  130 
  131 struct musbotg_super_softc {
  132         struct musbotg_softc    sc_otg;
  133         struct resource         *sc_mem_res[2];
  134         int                     sc_irq_rid;
  135         struct syscon           *syscon;
  136 };
  137 
  138 static void
  139 musbotg_vbus_poll(struct musbotg_super_softc *sc)
  140 {
  141         uint32_t stat;
  142 
  143         if (sc->sc_otg.sc_mode == MUSB2_DEVICE_MODE)
  144                 musbotg_vbus_interrupt(&sc->sc_otg, 1);
  145         else {
  146                 stat = USBCTRL_READ4(sc, USBCTRL_STAT);
  147                 musbotg_vbus_interrupt(&sc->sc_otg, stat & 1);
  148         }
  149 }
  150 
  151 /*
  152  * Arg to musbotg_clocks_on and musbot_clocks_off is
  153  * a uint32_t * pointing to the SCM register offset.
  154  */
  155 static uint32_t USB_CTRL[] = {SCM_USB_CTRL0, SCM_USB_CTRL1};
  156 
  157 static void
  158 musbotg_clocks_on(void *arg)
  159 {
  160         struct musbotg_softc *sc;
  161         struct musbotg_super_softc *ssc;
  162         uint32_t reg;
  163 
  164         sc = arg;
  165         ssc = sc->sc_platform_data;
  166 
  167         reg = SYSCON_READ_4(ssc->syscon, USB_CTRL[sc->sc_id]);
  168         reg &= ~3; /* Enable power */
  169         reg |= 1 << 19; /* VBUS detect enable */
  170         reg |= 1 << 20; /* Session end enable */
  171 
  172         SYSCON_WRITE_4(ssc->syscon, USB_CTRL[sc->sc_id], reg);
  173 }
  174 
  175 static void
  176 musbotg_clocks_off(void *arg)
  177 {
  178         struct musbotg_softc *sc;
  179         struct musbotg_super_softc *ssc;
  180         uint32_t reg;
  181 
  182         sc = arg;
  183         ssc = sc->sc_platform_data;
  184 
  185         /* Disable power to PHY */
  186         reg = SYSCON_READ_4(ssc->syscon, USB_CTRL[sc->sc_id]);
  187         SYSCON_WRITE_4(ssc->syscon, USB_CTRL[sc->sc_id], reg | 3);
  188 }
  189 
  190 static void
  191 musbotg_ep_int_set(struct musbotg_softc *sc, int ep, int on)
  192 {
  193         struct musbotg_super_softc *ssc = sc->sc_platform_data;
  194         uint32_t epmask;
  195 
  196         epmask = ((1 << ep) << IRQ_STAT0_RXSHIFT);
  197         epmask |= ((1 << ep) << IRQ_STAT0_TXSHIFT);
  198         if (on)
  199                 USBCTRL_WRITE4(ssc, USBCTRL_INTEN_SET0, epmask);
  200         else
  201                 USBCTRL_WRITE4(ssc, USBCTRL_INTEN_CLR0, epmask);
  202 }
  203 
  204 static void
  205 musbotg_wrapper_interrupt(void *arg)
  206 {
  207         struct musbotg_softc *sc = arg;
  208         struct musbotg_super_softc *ssc = sc->sc_platform_data;
  209         uint32_t stat, stat0, stat1;
  210 
  211         stat = USBCTRL_READ4(ssc, USBCTRL_STAT);
  212         stat0 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT0);
  213         stat1 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT1);
  214         if (stat0)
  215                 USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT0, stat0);
  216         if (stat1)
  217                 USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT1, stat1);
  218 
  219         DPRINTFN(4, "port%d: stat0=%08x stat1=%08x, stat=%08x\n",
  220             sc->sc_id, stat0, stat1, stat);
  221 
  222         if (stat1 & IRQ_STAT1_DRVVBUS)
  223                 musbotg_vbus_interrupt(sc, stat & 1);
  224 
  225         musbotg_interrupt(arg, ((stat0 >> 16) & 0xffff),
  226             stat0 & 0xffff, stat1 & 0xff);
  227 }
  228 
  229 static int
  230 musbotg_probe(device_t dev)
  231 {
  232         if (!ofw_bus_status_okay(dev))
  233                 return (ENXIO);
  234 
  235         if (!ofw_bus_is_compatible(dev, "ti,musb-am33xx"))
  236                 return (ENXIO);
  237 
  238         device_set_desc(dev, "TI AM33xx integrated USB OTG controller");
  239 
  240         return (BUS_PROBE_DEFAULT);
  241 }
  242 
  243 static int
  244 musbotg_attach(device_t dev)
  245 {
  246         struct musbotg_super_softc *sc = device_get_softc(dev);
  247         char mode[16];
  248         int err;
  249         uint32_t reg;
  250         phandle_t opp_table;
  251         clk_t clk_usbotg_fck;
  252 
  253         sc->sc_otg.sc_id = device_get_unit(dev);
  254 
  255         /* FIXME: The devicetree needs to be updated to get a handle to the gate
  256          * usbotg_fck@47c. see TRM 8.1.12.2 CM_WKUP CM_CLKDCOLDO_DPLL_PER.
  257          */
  258         err = clk_get_by_name(dev, "usbotg_fck@47c", &clk_usbotg_fck);
  259         if (err) {
  260                 device_printf(dev, "Can not find usbotg_fck@47c\n");
  261                 return (ENXIO);
  262         }
  263 
  264         err = clk_enable(clk_usbotg_fck);
  265         if (err) {
  266                 device_printf(dev, "Can not enable usbotg_fck@47c\n");
  267                 return (ENXIO);
  268         }
  269 
  270         /* FIXME: For now; Go and kidnap syscon from opp-table */
  271         opp_table = OF_finddevice("/opp-table");
  272         if (opp_table == -1) {
  273                 device_printf(dev, "Cant find /opp-table\n");
  274                 return (ENXIO);
  275         }
  276         if (!OF_hasprop(opp_table, "syscon")) {
  277                 device_printf(dev, "/opp-table missing syscon property\n");
  278                 return (ENXIO);
  279         }
  280         err = syscon_get_by_ofw_property(dev, opp_table, "syscon", &sc->syscon);
  281         if (err) {
  282                 device_printf(dev, "Failed to get syscon\n");
  283                 return (ENXIO);
  284         }
  285 
  286         /* Request the memory resources */
  287         err = bus_alloc_resources(dev, am335x_musbotg_mem_spec,
  288                 sc->sc_mem_res);
  289         if (err) {
  290                 device_printf(dev,
  291                     "Error: could not allocate mem resources\n");
  292                 return (ENXIO);
  293         }
  294 
  295         /* Request the IRQ resources */
  296         sc->sc_otg.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
  297             &sc->sc_irq_rid, RF_ACTIVE);
  298         if (sc->sc_otg.sc_irq_res == NULL) {
  299                 device_printf(dev,
  300                     "Error: could not allocate irq resources\n");
  301                 return (ENXIO);
  302         }
  303 
  304         /* setup MUSB OTG USB controller interface softc */
  305         sc->sc_otg.sc_clocks_on = &musbotg_clocks_on;
  306         sc->sc_otg.sc_clocks_off = &musbotg_clocks_off;
  307         sc->sc_otg.sc_clocks_arg = &sc->sc_otg;
  308 
  309         sc->sc_otg.sc_ep_int_set = musbotg_ep_int_set;
  310 
  311         /* initialise some bus fields */
  312         sc->sc_otg.sc_bus.parent = dev;
  313         sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
  314         sc->sc_otg.sc_bus.devices_max = MUSB2_MAX_DEVICES;
  315         sc->sc_otg.sc_bus.dma_bits = 32;
  316 
  317         /* get all DMA memory */
  318         if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
  319             USB_GET_DMA_TAG(dev), NULL)) {
  320                 device_printf(dev,
  321                     "Failed allocate bus mem for musb\n");
  322                 return (ENOMEM);
  323         }
  324         sc->sc_otg.sc_io_res = sc->sc_mem_res[RES_USBCORE];
  325         sc->sc_otg.sc_io_tag =
  326             rman_get_bustag(sc->sc_otg.sc_io_res);
  327         sc->sc_otg.sc_io_hdl =
  328             rman_get_bushandle(sc->sc_otg.sc_io_res);
  329         sc->sc_otg.sc_io_size =
  330             rman_get_size(sc->sc_otg.sc_io_res);
  331 
  332         sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
  333         if (!(sc->sc_otg.sc_bus.bdev)) {
  334                 device_printf(dev, "No busdev for musb\n");
  335                 goto error;
  336         }
  337         device_set_ivars(sc->sc_otg.sc_bus.bdev,
  338             &sc->sc_otg.sc_bus);
  339 
  340         err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res,
  341             INTR_TYPE_BIO | INTR_MPSAFE,
  342             NULL, (driver_intr_t *)musbotg_wrapper_interrupt,
  343             &sc->sc_otg, &sc->sc_otg.sc_intr_hdl);
  344         if (err) {
  345                 sc->sc_otg.sc_intr_hdl = NULL;
  346                 device_printf(dev,
  347                     "Failed to setup interrupt for musb\n");
  348                 goto error;
  349         }
  350 
  351         sc->sc_otg.sc_platform_data = sc;
  352         if (OF_getprop(ofw_bus_get_node(dev), "dr_mode", mode,
  353             sizeof(mode)) > 0) {
  354                 if (strcasecmp(mode, "host") == 0)
  355                         sc->sc_otg.sc_mode = MUSB2_HOST_MODE;
  356                 else
  357                         sc->sc_otg.sc_mode = MUSB2_DEVICE_MODE;
  358         } else {
  359                 /* Beaglebone defaults: USB0 device, USB1 HOST. */
  360                 if (sc->sc_otg.sc_id == 0)
  361                         sc->sc_otg.sc_mode = MUSB2_DEVICE_MODE;
  362                 else
  363                         sc->sc_otg.sc_mode = MUSB2_HOST_MODE;
  364         }
  365 
  366         /*
  367          * software-controlled function
  368          */
  369 
  370         if (sc->sc_otg.sc_mode == MUSB2_HOST_MODE) {
  371                 reg = USBCTRL_READ4(sc, USBCTRL_MODE);
  372                 reg |= USBCTRL_MODE_IDDIGMUX;
  373                 reg &= ~USBCTRL_MODE_IDDIG;
  374                 USBCTRL_WRITE4(sc, USBCTRL_MODE, reg);
  375                 USBCTRL_WRITE4(sc, USBCTRL_UTMI,
  376                     USBCTRL_UTMI_FSDATAEXT);
  377         } else {
  378                 reg = USBCTRL_READ4(sc, USBCTRL_MODE);
  379                 reg |= USBCTRL_MODE_IDDIGMUX;
  380                 reg |= USBCTRL_MODE_IDDIG;
  381                 USBCTRL_WRITE4(sc, USBCTRL_MODE, reg);
  382         }
  383 
  384         reg = USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF;
  385         USBCTRL_WRITE4(sc, USBCTRL_INTEN_SET1, reg);
  386         USBCTRL_WRITE4(sc, USBCTRL_INTEN_CLR0, 0xffffffff);
  387 
  388         err = musbotg_init(&sc->sc_otg);
  389         if (!err)
  390                 err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
  391 
  392         if (err)
  393                 goto error;
  394 
  395         /* poll VBUS one time */
  396         musbotg_vbus_poll(sc);
  397 
  398         return (0);
  399 
  400 error:
  401         musbotg_detach(dev);
  402         return (ENXIO);
  403 }
  404 
  405 static int
  406 musbotg_detach(device_t dev)
  407 {
  408         struct musbotg_super_softc *sc = device_get_softc(dev);
  409 
  410         /* during module unload there are lots of children leftover */
  411         device_delete_children(dev);
  412 
  413         if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
  414                 /*
  415                  * only call musbotg_uninit() after musbotg_init()
  416                  */
  417                 musbotg_uninit(&sc->sc_otg);
  418 
  419                 bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
  420                     sc->sc_otg.sc_intr_hdl);
  421                 sc->sc_otg.sc_intr_hdl = NULL;
  422         }
  423 
  424         usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);
  425 
  426         /* Free resources if any */
  427         if (sc->sc_mem_res[0])
  428                 bus_release_resources(dev, am335x_musbotg_mem_spec,
  429                     sc->sc_mem_res);
  430 
  431         if (sc->sc_otg.sc_irq_res)
  432                 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
  433                     sc->sc_otg.sc_irq_res);
  434 
  435         return (0);
  436 }
  437 
  438 static device_method_t musbotg_methods[] = {
  439         /* Device interface */
  440         DEVMETHOD(device_probe, musbotg_probe),
  441         DEVMETHOD(device_attach, musbotg_attach),
  442         DEVMETHOD(device_detach, musbotg_detach),
  443         DEVMETHOD(device_suspend, bus_generic_suspend),
  444         DEVMETHOD(device_resume, bus_generic_resume),
  445         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  446 
  447         DEVMETHOD_END
  448 };
  449 
  450 static driver_t musbotg_driver = {
  451         .name = "musbotg",
  452         .methods = musbotg_methods,
  453         .size = sizeof(struct musbotg_super_softc),
  454 };
  455 
  456 DRIVER_MODULE(musbotg, ti_sysc, musbotg_driver, 0, 0);
  457 MODULE_DEPEND(musbotg, ti_sysc, 1, 1, 1);
  458 MODULE_DEPEND(musbotg, ti_am3359_cppi41, 1, 1, 1);
  459 MODULE_DEPEND(usbss, usb, 1, 1, 1);
Cache object: 8141cbb42a516740cd25e9e0cbc3550d
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FreeBSD/Linux Kernel Cross Reference sys/arm/ti/am335x/am335x_musb.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/am335x/am335x_musb.c
