The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/omap4/omap4_smc.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012 Olivier Houchard.  All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   25  */
   26 
   27 /*
   28  * $FreeBSD$
   29  */
   30 
   31 #ifndef OMAP4_SMC_H_
   32 #define OMAP4_SMC_H_
   33 /* Define the various function IDs used by the OMAP4 */
   34 #define L2CACHE_WRITE_DEBUG_REG         0x100
   35 #define L2CACHE_CLEAN_INV_RANG          0x101
   36 #define L2CACHE_WRITE_CTRL_REG          0x102
   37 #define READ_AUX_CORE_REGS              0x103
   38 #define MODIFY_AUX_CORE_0               0x104
   39 #define WRITE_AUX_CORE_1                0x105
   40 #define READ_WKG_CTRL_REG               0x106
   41 #define CLEAR_WKG_CTRL_REG              0x107
   42 #define SET_POWER_STATUS_REG            0x108
   43 #define WRITE_AUXCTRL_REG               0x109
   44 #define LOCKDOWN_TLB                    0x10a
   45 #define SELECT_TLB_ENTRY_FOR_WRITE      0x10b
   46 #define READ_TLB_VA_ENTRY               0x10c
   47 #define WRITE_TLB_VA_ENTRY              0x10d
   48 #define READ_TLB_PA_ENTRY               0x10e
   49 #define WRITE_TLB_PA_ENTRY              0x10f
   50 #define READ_TLB_ATTR_ENTRY             0x110
   51 #define WRITE_TLB_ATTR_ENTRY            0x111
   52 #define WRITE_LATENCY_CTRL_REG          0x112
   53 #define WRITE_PREFETCH_CTRL_REG         0x113
   54 #endif /* OMAP4_SMC_H_ */

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