The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/ti_mbox.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   25  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   26  * POSSIBILITY OF SUCH DAMAGE.
   27  */
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/systm.h>
   33 #include <sys/bus.h>
   34 #include <sys/kernel.h>
   35 #include <sys/module.h>
   36 #include <sys/malloc.h>
   37 #include <sys/rman.h>
   38 #include <sys/timeet.h>
   39 #include <sys/timetc.h>
   40 #include <sys/watchdog.h>
   41 #include <machine/bus.h>
   42 #include <machine/cpu.h>
   43 #include <machine/frame.h>
   44 #include <machine/intr.h>
   45 
   46 #include <dev/ofw/openfirm.h>
   47 #include <dev/ofw/ofw_bus.h>
   48 #include <dev/ofw/ofw_bus_subr.h>
   49 
   50 #include <machine/bus.h>
   51 
   52 #include <arm/ti/ti_mbox.h>
   53 #include <arm/ti/ti_sysc.h>
   54 
   55 #include "mbox_if.h"
   56 
   57 #ifdef DEBUG
   58 #define DPRINTF(fmt, ...)       do {    \
   59         printf("%s: ", __func__);       \
   60         printf(fmt, __VA_ARGS__);       \
   61 } while (0)
   62 #else
   63 #define DPRINTF(fmt, ...)
   64 #endif
   65 
   66 static device_probe_t           ti_mbox_probe;
   67 static device_attach_t          ti_mbox_attach;
   68 static device_detach_t          ti_mbox_detach;
   69 static void                     ti_mbox_intr(void *);
   70 static int                      ti_mbox_read(device_t, int, uint32_t *);
   71 static int                      ti_mbox_write(device_t, int, uint32_t);
   72 
   73 struct ti_mbox_softc {
   74         struct mtx              sc_mtx;
   75         struct resource         *sc_mem_res;
   76         struct resource         *sc_irq_res;
   77         void                    *sc_intr;
   78         bus_space_tag_t         sc_bt;
   79         bus_space_handle_t      sc_bh;
   80 };
   81 
   82 #define TI_MBOX_LOCK(sc)        mtx_lock(&(sc)->sc_mtx)
   83 #define TI_MBOX_UNLOCK(sc)      mtx_unlock(&(sc)->sc_mtx)
   84 
   85 static device_method_t ti_mbox_methods[] = {
   86         DEVMETHOD(device_probe,         ti_mbox_probe),
   87         DEVMETHOD(device_attach,        ti_mbox_attach),
   88         DEVMETHOD(device_detach,        ti_mbox_detach),
   89 
   90         DEVMETHOD(mbox_read,            ti_mbox_read),
   91         DEVMETHOD(mbox_write,           ti_mbox_write),
   92 
   93         DEVMETHOD_END
   94 };
   95 
   96 static driver_t ti_mbox_driver = {
   97         "ti_mbox",
   98         ti_mbox_methods,
   99         sizeof(struct ti_mbox_softc)
  100 };
  101 
  102 static devclass_t ti_mbox_devclass;
  103 
  104 DRIVER_MODULE(ti_mbox, simplebus, ti_mbox_driver, ti_mbox_devclass, 0, 0);
  105 MODULE_DEPEND(ti_mbox, ti_sysc, 1, 1, 1);
  106 
  107 static __inline uint32_t
  108 ti_mbox_reg_read(struct ti_mbox_softc *sc, uint16_t reg)
  109 {
  110         return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
  111 }
  112 
  113 static __inline void
  114 ti_mbox_reg_write(struct ti_mbox_softc *sc, uint16_t reg, uint32_t val)
  115 {
  116         bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
  117 }
  118 
  119 static int
  120 ti_mbox_probe(device_t dev)
  121 {
  122 
  123         if (!ofw_bus_status_okay(dev))
  124                 return (ENXIO);
  125 
  126         if (ofw_bus_is_compatible(dev, "ti,omap4-mailbox")) {
  127                 device_set_desc(dev, "TI System Mailbox");
  128                 return (BUS_PROBE_DEFAULT);
  129         }
  130 
  131         return (ENXIO);
  132 }
  133 
  134 static int
  135 ti_mbox_attach(device_t dev)
  136 {
  137         struct ti_mbox_softc *sc;
  138         int rid, delay, chan;
  139         uint32_t rev, sysconfig;
  140 
  141         if (ti_sysc_clock_enable(device_get_parent(dev)) != 0) {
  142                 device_printf(dev, "could not enable MBOX clock\n");
  143                 return (ENXIO);
  144         }
  145 
  146         sc = device_get_softc(dev);
  147         rid = 0;
  148         mtx_init(&sc->sc_mtx, "TI mbox", NULL, MTX_DEF);
  149         sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  150             RF_ACTIVE);
  151         if (sc->sc_mem_res == NULL) {
  152                 device_printf(dev, "could not allocate memory resource\n");
  153                 return (ENXIO);
  154         }
  155         sc->sc_bt = rman_get_bustag(sc->sc_mem_res);
  156         sc->sc_bh = rman_get_bushandle(sc->sc_mem_res);
  157         rid = 0;
  158         sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  159             RF_ACTIVE);
  160         if (sc->sc_irq_res == NULL) {
  161                 device_printf(dev, "could not allocate interrupt resource\n");
  162                 ti_mbox_detach(dev);
  163                 return (ENXIO);
  164         }
  165         if (bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE | INTR_TYPE_MISC,
  166             NULL, ti_mbox_intr, sc, &sc->sc_intr) != 0) {
  167                 device_printf(dev, "unable to setup the interrupt handler\n");
  168                 ti_mbox_detach(dev);
  169                 return (ENXIO);
  170         }
  171         /*
  172          * Reset the controller.
  173          */
  174         sysconfig = ti_mbox_reg_read(sc, TI_MBOX_SYSCONFIG);
  175         DPRINTF("initial sysconfig %d\n", sysconfig);
  176         sysconfig |= TI_MBOX_SYSCONFIG_SOFTRST;
  177         ti_mbox_reg_write(sc, TI_MBOX_SYSCONFIG, sysconfig);
  178         delay = 100;
  179         while (ti_mbox_reg_read(sc, TI_MBOX_SYSCONFIG) & 
  180             TI_MBOX_SYSCONFIG_SOFTRST) {
  181                 delay--;
  182                 DELAY(10);
  183         }
  184         if (delay == 0) {
  185                 device_printf(dev, "controller reset failed\n");
  186                 ti_mbox_detach(dev);
  187                 return (ENXIO);
  188         }
  189         /*
  190          * Enable smart idle mode.
  191          */
  192         ti_mbox_reg_write(sc, TI_MBOX_SYSCONFIG,
  193             ti_mbox_reg_read(sc, TI_MBOX_SYSCONFIG) | TI_MBOX_SYSCONFIG_SMARTIDLE);
  194         rev = ti_mbox_reg_read(sc,
  195             ti_sysc_get_rev_address_offset_host(device_get_parent(dev)));
  196         DPRINTF("rev %d\n", rev);
  197         device_printf(dev, "revision %d.%d\n", (rev >> 8) & 0x4, rev & 0x40);
  198         /*
  199          * Enable message interrupts.
  200          */
  201         for (chan = 0; chan < 8; chan++)
  202                 ti_mbox_reg_write(sc, TI_MBOX_IRQENABLE_SET(chan), 1);
  203 
  204         return (0);
  205 }
  206 
  207 static int
  208 ti_mbox_detach(device_t dev)
  209 {
  210         struct ti_mbox_softc *sc;
  211 
  212         sc = device_get_softc(dev);
  213         if (sc->sc_intr)
  214                 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr);
  215         if (sc->sc_irq_res)
  216                 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->sc_irq_res),
  217                     sc->sc_irq_res);
  218         if (sc->sc_mem_res)
  219                 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->sc_mem_res),
  220                     sc->sc_mem_res);
  221 
  222         return (0);
  223 }
  224 
  225 static void
  226 ti_mbox_intr(void *arg)
  227 {
  228         struct ti_mbox_softc *sc;
  229 
  230         sc = arg;
  231         DPRINTF("interrupt %p", sc);
  232 }
  233 
  234 static int
  235 ti_mbox_read(device_t dev, int chan, uint32_t *data)
  236 {
  237         struct ti_mbox_softc *sc;
  238 
  239         if (chan < 0 || chan > 7)
  240                 return (EINVAL);
  241         sc = device_get_softc(dev);
  242 
  243         return (ti_mbox_reg_read(sc, TI_MBOX_MESSAGE(chan)));
  244 }
  245 
  246 static int
  247 ti_mbox_write(device_t dev, int chan, uint32_t data)
  248 {
  249         int limit = 500;
  250         struct ti_mbox_softc *sc;
  251 
  252         if (chan < 0 || chan > 7)
  253                 return (EINVAL);
  254         sc = device_get_softc(dev);
  255         TI_MBOX_LOCK(sc);
  256         /* XXX implement interrupt method */
  257         while (ti_mbox_reg_read(sc, TI_MBOX_FIFOSTATUS(chan)) == 1 && 
  258             limit--) {
  259                 DELAY(10);
  260         }
  261         if (limit == 0) {
  262                 device_printf(dev, "FIFOSTAUS%d stuck\n", chan);
  263                 TI_MBOX_UNLOCK(sc);
  264                 return (EAGAIN);
  265         }
  266         ti_mbox_reg_write(sc, TI_MBOX_MESSAGE(chan), data);
  267 
  268         return (0);
  269 }

Cache object: d64c39546342a9b26a7491b2c71cbcf2


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