The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/ti_prcm.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
    5  * All rights reserved.
    6  *
    7  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   23  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   24  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   25  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD$
   31  */
   32 
   33 /* Based on sys/arm/ti/am335x/am335x_prcm.c */
   34 
   35 #include <sys/cdefs.h>
   36 __FBSDID("$FreeBSD$");
   37 
   38 #include <sys/param.h>
   39 #include <sys/systm.h>
   40 #include <sys/bus.h>
   41 #include <sys/kernel.h>
   42 #include <sys/module.h>
   43 #include <sys/malloc.h>
   44 #include <sys/rman.h>
   45 #include <sys/timeet.h>
   46 #include <sys/timetc.h>
   47 #include <sys/watchdog.h>
   48 #include <machine/bus.h>
   49 #include <machine/cpu.h>
   50 #include <machine/intr.h>
   51 
   52 #include <arm/ti/ti_cpuid.h>
   53 #include <arm/ti/ti_prcm.h>
   54 #include <arm/ti/tivar.h>
   55 
   56 #include <dev/fdt/simplebus.h>
   57 
   58 #include <dev/ofw/openfirm.h>
   59 #include <dev/ofw/ofw_bus.h>
   60 #include <dev/ofw/ofw_bus_subr.h>
   61 
   62 #include "clkdev_if.h"
   63 
   64 #if 0
   65 #define DPRINTF(dev, msg...) device_printf(dev, msg)
   66 #else
   67 #define DPRINTF(dev, msg...)
   68 #endif
   69 
   70 struct ti_prcm_softc {
   71         struct simplebus_softc  sc_simplebus;
   72         device_t                dev;
   73         struct resource *       mem_res;
   74         bus_space_tag_t         bst;
   75         bus_space_handle_t      bsh;
   76         int                     attach_done;
   77         struct mtx              mtx;
   78 };
   79 
   80 static struct ti_prcm_softc *ti_prcm_sc = NULL;
   81 static void omap4_prcm_reset(void);
   82 static void am335x_prcm_reset(void);
   83 
   84 #define TI_AM3_PRCM             18
   85 #define TI_AM4_PRCM             17
   86 #define TI_OMAP2_PRCM           16
   87 #define TI_OMAP3_PRM            15
   88 #define TI_OMAP3_CM             14
   89 #define TI_OMAP4_CM1            13
   90 #define TI_OMAP4_PRM            12
   91 #define TI_OMAP4_CM2            11
   92 #define TI_OMAP4_SCRM           10
   93 #define TI_OMAP5_PRM            9
   94 #define TI_OMAP5_CM_CORE_AON    8
   95 #define TI_OMAP5_SCRM           7
   96 #define TI_OMAP5_CM_CORE        6
   97 #define TI_DRA7_PRM             5
   98 #define TI_DRA7_CM_CORE_AON     4
   99 #define TI_DRA7_CM_CORE         3
  100 #define TI_DM814_PRCM           2
  101 #define TI_DM816_PRCM           1
  102 #define TI_PRCM_END             0
  103 
  104 static struct ofw_compat_data compat_data[] = {
  105         { "ti,am3-prcm",                TI_AM3_PRCM },
  106         { "ti,am4-prcm",                TI_AM4_PRCM },
  107         { "ti,omap2-prcm",              TI_OMAP2_PRCM },
  108         { "ti,omap3-prm",               TI_OMAP3_PRM },
  109         { "ti,omap3-cm",                TI_OMAP3_CM },
  110         { "ti,omap4-cm1",               TI_OMAP4_CM1 },
  111         { "ti,omap4-prm",               TI_OMAP4_PRM },
  112         { "ti,omap4-cm2",               TI_OMAP4_CM2 },
  113         { "ti,omap4-scrm",              TI_OMAP4_SCRM },
  114         { "ti,omap5-prm",               TI_OMAP5_PRM },
  115         { "ti,omap5-cm-core-aon",       TI_OMAP5_CM_CORE_AON },
  116         { "ti,omap5-scrm",              TI_OMAP5_SCRM },
  117         { "ti,omap5-cm-core",           TI_OMAP5_CM_CORE },
  118         { "ti,dra7-prm",                TI_DRA7_PRM },
  119         { "ti,dra7-cm-core-aon",        TI_DRA7_CM_CORE_AON },
  120         { "ti,dra7-cm-core",            TI_DRA7_CM_CORE },
  121         { "ti,dm814-prcm",              TI_DM814_PRCM },
  122         { "ti,dm816-prcm",              TI_DM816_PRCM },
  123         { NULL,                         TI_PRCM_END}
  124 };
  125 
  126 static int
  127 ti_prcm_probe(device_t dev)
  128 {
  129         if (!ofw_bus_status_okay(dev))
  130                 return (ENXIO);
  131 
  132         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) {
  133                 return (ENXIO);
  134         }
  135 
  136         device_set_desc(dev, "TI Power and Clock Management");
  137         return(BUS_PROBE_DEFAULT);
  138 }
  139 
  140 static int
  141 ti_prcm_attach(device_t dev)
  142 {
  143         struct ti_prcm_softc *sc;
  144         phandle_t node, child;
  145         int rid;
  146 
  147         sc = device_get_softc(dev);
  148         sc->dev = dev;
  149 
  150         node = ofw_bus_get_node(sc->dev);
  151         simplebus_init(sc->dev, node);
  152 
  153         if (simplebus_fill_ranges(node, &sc->sc_simplebus) < 0) {
  154                 device_printf(sc->dev, "could not get ranges\n");
  155                 return (ENXIO);
  156         }
  157         if (sc->sc_simplebus.nranges == 0) {
  158                 device_printf(sc->dev, "nranges == 0\n");
  159                 return (ENXIO);
  160         }
  161 
  162         sc->mem_res = bus_alloc_resource(sc->dev, SYS_RES_MEMORY, &rid,
  163                 sc->sc_simplebus.ranges[0].host,
  164                 (sc->sc_simplebus.ranges[0].host +
  165                         sc->sc_simplebus.ranges[0].size - 1),
  166                 sc->sc_simplebus.ranges[0].size,
  167                 RF_ACTIVE | RF_SHAREABLE);
  168 
  169         if (sc->mem_res == NULL) {
  170                 return (ENXIO);
  171         }
  172 
  173         sc->bst = rman_get_bustag(sc->mem_res);
  174         sc->bsh = rman_get_bushandle(sc->mem_res);
  175 
  176         mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
  177 
  178         /* Fixme: for xxx_prcm_reset functions.
  179          * Get rid of global variables?
  180          */
  181         ti_prcm_sc = sc;
  182 
  183         switch(ti_chip()) {
  184 #ifdef SOC_OMAP4
  185         case CHIP_OMAP_4:
  186                 ti_cpu_reset = omap4_prcm_reset;
  187                 break;
  188 #endif
  189 #ifdef SOC_TI_AM335X
  190         case CHIP_AM335X:
  191                 ti_cpu_reset = am335x_prcm_reset;
  192                 break;
  193 #endif
  194         }
  195 
  196         bus_generic_probe(sc->dev);
  197         for (child = OF_child(node); child != 0; child = OF_peer(child)) {
  198                 simplebus_add_device(dev, child, 0, NULL, -1, NULL);
  199         }
  200 
  201         return (bus_generic_attach(sc->dev));
  202 }
  203 
  204 int
  205 ti_prcm_write_4(device_t dev, bus_addr_t addr, uint32_t val)
  206 {
  207         struct ti_prcm_softc *sc;
  208 
  209         sc = device_get_softc(dev);
  210         DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val);
  211         bus_space_write_4(sc->bst, sc->bsh, addr, val);
  212         return (0);
  213 }
  214 int
  215 ti_prcm_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
  216 {
  217         struct ti_prcm_softc *sc;
  218 
  219         sc = device_get_softc(dev);
  220 
  221         *val = bus_space_read_4(sc->bst, sc->bsh, addr);
  222         DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val);
  223         return (0);
  224 }
  225 
  226 int
  227 ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set)
  228 {
  229         struct ti_prcm_softc *sc;
  230         uint32_t reg;
  231 
  232         sc = device_get_softc(dev);
  233 
  234         reg = bus_space_read_4(sc->bst, sc->bsh, addr);
  235         reg &= ~clr;
  236         reg |= set;
  237         bus_space_write_4(sc->bst, sc->bsh, addr, reg);
  238         DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set);
  239 
  240         return (0);
  241 }
  242 
  243 void
  244 ti_prcm_device_lock(device_t dev)
  245 {
  246         struct ti_prcm_softc *sc;
  247 
  248         sc = device_get_softc(dev);
  249         mtx_lock(&sc->mtx);
  250 }
  251 
  252 void
  253 ti_prcm_device_unlock(device_t dev)
  254 {
  255         struct ti_prcm_softc *sc;
  256 
  257         sc = device_get_softc(dev);
  258         mtx_unlock(&sc->mtx);
  259 }
  260 
  261 static device_method_t ti_prcm_methods[] = {
  262         DEVMETHOD(device_probe,         ti_prcm_probe),
  263         DEVMETHOD(device_attach,        ti_prcm_attach),
  264 
  265         /* clkdev interface */
  266         DEVMETHOD(clkdev_write_4,       ti_prcm_write_4),
  267         DEVMETHOD(clkdev_read_4,        ti_prcm_read_4),
  268         DEVMETHOD(clkdev_modify_4,      ti_prcm_modify_4),
  269         DEVMETHOD(clkdev_device_lock,   ti_prcm_device_lock),
  270         DEVMETHOD(clkdev_device_unlock, ti_prcm_device_unlock),
  271 
  272         DEVMETHOD_END
  273 };
  274 
  275 DEFINE_CLASS_1(ti_prcm, ti_prcm_driver, ti_prcm_methods,
  276     sizeof(struct ti_prcm_softc), simplebus_driver);
  277 
  278 static devclass_t ti_prcm_devclass;
  279 
  280 EARLY_DRIVER_MODULE(ti_prcm, ofwbus, ti_prcm_driver,
  281         ti_prcm_devclass, 0, 0, BUS_PASS_BUS);
  282 EARLY_DRIVER_MODULE(ti_prcm, simplebus, ti_prcm_driver,
  283         ti_prcm_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
  284 MODULE_VERSION(ti_prcm, 1);
  285 MODULE_DEPEND(ti_prcm, ti_scm, 1, 1, 1);
  286 
  287 /* From sys/arm/ti/am335x/am335x_prcm.c
  288  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
  289  */
  290 #define PRM_DEVICE_OFFSET               0xF00
  291 #define AM335x_PRM_RSTCTRL              (PRM_DEVICE_OFFSET + 0x00)
  292 
  293 static void
  294 am335x_prcm_reset(void)
  295 {
  296         ti_prcm_write_4(ti_prcm_sc->dev, AM335x_PRM_RSTCTRL, (1<<1));
  297 }
  298 
  299 /* FIXME: Is this correct - or should the license part be ontop? */
  300 
  301 /* From sys/arm/ti/omap4/omap4_prcm_clks.c */
  302 /*-
  303  * SPDX-License-Identifier: BSD-3-Clause
  304  *
  305  * Copyright (c) 2011
  306  *      Ben Gray <ben.r.gray@gmail.com>.
  307  * All rights reserved.
  308  *
  309  * Redistribution and use in source and binary forms, with or without
  310  * modification, are permitted provided that the following conditions
  311  * are met:
  312  * 1. Redistributions of source code must retain the above copyright
  313  *    notice, this list of conditions and the following disclaimer.
  314  * 2. Redistributions in binary form must reproduce the above copyright
  315  *    notice, this list of conditions and the following disclaimer in the
  316  *    documentation and/or other materials provided with the distribution.
  317  * 3. The name of the company nor the name of the author may be used to
  318  *    endorse or promote products derived from this software without specific
  319  *    prior written permission.
  320  *
  321  * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
  322  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  323  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  324  * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  325  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  326  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  327  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  328  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  329  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  330  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  331  */
  332 #define PRM_RSTCTRL             0x1b00
  333 #define PRM_RSTCTRL_RESET       0x2
  334 
  335 static void
  336 omap4_prcm_reset(void)
  337 {
  338         uint32_t reg;
  339 
  340         ti_prcm_read_4(ti_prcm_sc->dev, PRM_RSTCTRL, &reg);
  341         reg = reg | PRM_RSTCTRL_RESET;
  342         ti_prcm_write_4(ti_prcm_sc->dev, PRM_RSTCTRL, reg);
  343         ti_prcm_read_4(ti_prcm_sc->dev, PRM_RSTCTRL, &reg);
  344 }

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