Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/ti_scm_syscon.c
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1 /*- 2 * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.org> 3 * 4 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 /* Based on sys/arm/ti/ti_sysc.c */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/resource.h> 40 #include <sys/rman.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 47 #include <dev/fdt/simplebus.h> 48 49 #include <dev/ofw/openfirm.h> 50 #include <dev/ofw/ofw_bus.h> 51 #include <dev/ofw/ofw_bus_subr.h> 52 53 #include "syscon_if.h" 54 #include <dev/extres/syscon/syscon.h> 55 #include "clkdev_if.h" 56 57 #include <arm/ti/ti_cpuid.h> 58 59 #if 0 60 #define DPRINTF(dev, msg...) device_printf(dev, msg) 61 #else 62 #define DPRINTF(dev, msg...) 63 #endif 64 65 MALLOC_DECLARE(M_SYSCON); 66 67 struct ti_scm_syscon_softc { 68 struct simplebus_softc sc_simplebus; 69 device_t dev; 70 struct syscon * syscon; 71 struct resource * res[1]; 72 bus_space_tag_t bst; 73 bus_space_handle_t bsh; 74 struct mtx mtx; 75 }; 76 77 static struct resource_spec ti_scm_syscon_res_spec[] = { 78 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 79 { -1, 0 } 80 }; 81 82 /* Device */ 83 static struct ofw_compat_data compat_data[] = { 84 { "syscon", 1 }, 85 { NULL, 0 } 86 }; 87 88 /* --- dev/extres/syscon syscon_method_t interface --- */ 89 static int 90 ti_scm_syscon_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val) 91 { 92 struct ti_scm_syscon_softc *sc; 93 94 sc = device_get_softc(syscon->pdev); 95 DPRINTF(sc->dev, "offset=%lx write %x\n", offset, val); 96 mtx_lock(&sc->mtx); 97 bus_space_write_4(sc->bst, sc->bsh, offset, val); 98 mtx_unlock(&sc->mtx); 99 return (0); 100 } 101 102 static uint32_t 103 ti_scm_syscon_read_4(struct syscon *syscon, bus_size_t offset) 104 { 105 struct ti_scm_syscon_softc *sc; 106 uint32_t val; 107 108 sc = device_get_softc(syscon->pdev); 109 110 mtx_lock(&sc->mtx); 111 val = bus_space_read_4(sc->bst, sc->bsh, offset); 112 mtx_unlock(&sc->mtx); 113 DPRINTF(sc->dev, "offset=%lx Read %x\n", offset, val); 114 return (val); 115 } 116 static int 117 ti_scm_syscon_modify_4(struct syscon *syscon, bus_size_t offset, uint32_t clr, uint32_t set) 118 { 119 struct ti_scm_syscon_softc *sc; 120 uint32_t reg; 121 122 sc = device_get_softc(syscon->pdev); 123 124 mtx_lock(&sc->mtx); 125 reg = bus_space_read_4(sc->bst, sc->bsh, offset); 126 reg &= ~clr; 127 reg |= set; 128 bus_space_write_4(sc->bst, sc->bsh, offset, reg); 129 mtx_unlock(&sc->mtx); 130 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", offset, reg, clr, set); 131 132 return (0); 133 } 134 135 static syscon_method_t ti_scm_syscon_reg_methods[] = { 136 SYSCONMETHOD(syscon_read_4, ti_scm_syscon_read_4), 137 SYSCONMETHOD(syscon_write_4, ti_scm_syscon_write_4), 138 SYSCONMETHOD(syscon_modify_4, ti_scm_syscon_modify_4), 139 140 SYSCONMETHOD_END 141 }; 142 143 DEFINE_CLASS_1(ti_scm_syscon_reg, ti_scm_syscon_reg_class, ti_scm_syscon_reg_methods, 144 0, syscon_class); 145 146 /* device interface */ 147 static int 148 ti_scm_syscon_probe(device_t dev) 149 { 150 if (!ofw_bus_status_okay(dev)) 151 return (ENXIO); 152 153 if (!ti_soc_is_supported()) 154 return (ENXIO); 155 156 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 157 return (ENXIO); 158 159 device_set_desc(dev, "TI OMAP Control Module Syscon"); 160 return(BUS_PROBE_DEFAULT); 161 } 162 163 static int 164 ti_scm_syscon_attach(device_t dev) 165 { 166 struct ti_scm_syscon_softc *sc; 167 phandle_t node, child; 168 169 sc = device_get_softc(dev); 170 sc->dev = dev; 171 172 if (bus_alloc_resources(dev, ti_scm_syscon_res_spec, sc->res)) { 173 device_printf(sc->dev, "Cant allocate resources\n"); 174 return (ENXIO); 175 } 176 177 sc->dev = dev; 178 sc->bst = rman_get_bustag(sc->res[0]); 179 sc->bsh = rman_get_bushandle(sc->res[0]); 180 181 mtx_init(&sc->mtx, device_get_nameunit(sc->dev), NULL, MTX_DEF); 182 node = ofw_bus_get_node(sc->dev); 183 184 /* dev/extres/syscon interface */ 185 sc->syscon = syscon_create_ofw_node(dev, &ti_scm_syscon_reg_class, node); 186 if (sc->syscon == NULL) { 187 device_printf(dev, "Failed to create/register syscon\n"); 188 return (ENXIO); 189 } 190 191 simplebus_init(sc->dev, node); 192 193 bus_generic_probe(sc->dev); 194 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 195 simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL); 196 } 197 198 return (bus_generic_attach(sc->dev)); 199 } 200 201 /* syscon interface */ 202 static int 203 ti_scm_syscon_get_handle(device_t dev, struct syscon **syscon) 204 { 205 struct ti_scm_syscon_softc *sc; 206 207 sc = device_get_softc(dev); 208 *syscon = sc->syscon; 209 if (*syscon == NULL) 210 return (ENODEV); 211 return (0); 212 } 213 214 /* clkdev interface */ 215 static int 216 ti_scm_syscon_clk_write_4(device_t dev, bus_addr_t addr, uint32_t val) 217 { 218 struct ti_scm_syscon_softc *sc; 219 220 sc = device_get_softc(dev); 221 DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val); 222 bus_space_write_4(sc->bst, sc->bsh, addr, val); 223 return (0); 224 } 225 226 static int 227 ti_scm_syscon_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val) 228 { 229 struct ti_scm_syscon_softc *sc; 230 231 sc = device_get_softc(dev); 232 233 *val = bus_space_read_4(sc->bst, sc->bsh, addr); 234 DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val); 235 return (0); 236 } 237 238 static int 239 ti_scm_syscon_clk_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) 240 { 241 struct ti_scm_syscon_softc *sc; 242 uint32_t reg; 243 244 sc = device_get_softc(dev); 245 246 reg = bus_space_read_4(sc->bst, sc->bsh, addr); 247 reg &= ~clr; 248 reg |= set; 249 bus_space_write_4(sc->bst, sc->bsh, addr, reg); 250 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); 251 252 return (0); 253 } 254 255 static void 256 ti_scm_syscon_clk_device_lock(device_t dev) 257 { 258 struct ti_scm_syscon_softc *sc; 259 260 sc = device_get_softc(dev); 261 mtx_lock(&sc->mtx); 262 } 263 264 static void 265 ti_scm_syscon_clk_device_unlock(device_t dev) 266 { 267 struct ti_scm_syscon_softc *sc; 268 sc = device_get_softc(dev); 269 mtx_unlock(&sc->mtx); 270 } 271 272 static device_method_t ti_scm_syscon_methods[] = { 273 DEVMETHOD(device_probe, ti_scm_syscon_probe), 274 DEVMETHOD(device_attach, ti_scm_syscon_attach), 275 276 /* syscon interface */ 277 DEVMETHOD(syscon_get_handle, ti_scm_syscon_get_handle), 278 279 /* clkdev interface */ 280 DEVMETHOD(clkdev_write_4, ti_scm_syscon_clk_write_4), 281 DEVMETHOD(clkdev_read_4, ti_scm_syscon_clk_read_4), 282 DEVMETHOD(clkdev_modify_4, ti_scm_syscon_clk_modify_4), 283 DEVMETHOD(clkdev_device_lock, ti_scm_syscon_clk_device_lock), 284 DEVMETHOD(clkdev_device_unlock, ti_scm_syscon_clk_device_unlock), 285 286 DEVMETHOD_END 287 }; 288 289 DEFINE_CLASS_1(ti_scm_syscon, ti_scm_syscon_driver, ti_scm_syscon_methods, 290 sizeof(struct ti_scm_syscon_softc), simplebus_driver); 291 292 EARLY_DRIVER_MODULE(ti_scm_syscon, simplebus, ti_scm_syscon_driver, 0, 0, 293 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 294 MODULE_VERSION(ti_scm_syscon, 1); 295 MODULE_DEPEND(ti_scm_syscon, ti_scm, 1, 1, 1);
Cache object: 55580eeb6ab38cc385b5a6da4b06d8f6
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