Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/ti/usb/omap_tll.c
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1 /*- 2 * Copyright (c) 2011 3 * Ben Gray <ben.r.gray@gmail.com>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/rman.h> 36 #include <sys/module.h> 37 38 #include <dev/ofw/ofw_bus_subr.h> 39 40 #include <machine/bus.h> 41 42 #include <arm/ti/ti_sysc.h> 43 #include <arm/ti/usb/omap_usb.h> 44 45 /* 46 * USB TLL Module 47 */ 48 #define OMAP_USBTLL_REVISION 0x0000 49 #define OMAP_USBTLL_SYSCONFIG 0x0010 50 #define OMAP_USBTLL_SYSSTATUS 0x0014 51 #define OMAP_USBTLL_IRQSTATUS 0x0018 52 #define OMAP_USBTLL_IRQENABLE 0x001C 53 #define OMAP_USBTLL_TLL_SHARED_CONF 0x0030 54 #define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i))) 55 #define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i))) 56 #define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i))) 57 #define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i))) 58 #define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i))) 59 #define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i))) 60 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i))) 61 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i))) 62 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i))) 63 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i))) 64 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i))) 65 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i))) 66 #define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i))) 67 #define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i))) 68 #define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i))) 69 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i))) 70 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i))) 71 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i))) 72 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i))) 73 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i))) 74 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i))) 75 #define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i))) 76 #define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i))) 77 #define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i))) 78 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i))) 79 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i))) 80 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i))) 81 #define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i))) 82 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i))) 83 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i))) 84 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i))) 85 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i))) 86 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i))) 87 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i))) 88 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i))) 89 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i))) 90 #define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i))) 91 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i))) 92 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i))) 93 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i))) 94 #define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i))) 95 #define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i))) 96 97 /* TLL Register Set */ 98 #define TLL_SYSCONFIG_CACTIVITY (1UL << 8) 99 #define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3) 100 #define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3) 101 #define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3) 102 #define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2) 103 #define TLL_SYSCONFIG_SOFTRESET (1UL << 1) 104 #define TLL_SYSCONFIG_AUTOIDLE (1UL << 0) 105 106 #define TLL_SYSSTATUS_RESETDONE (1UL << 0) 107 108 #define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6) 109 #define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5) 110 #define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2) 111 #define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2) 112 #define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2) 113 #define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2) 114 #define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2) 115 #define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2) 116 #define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2) 117 #define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2) 118 #define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2) 119 #define TLL_SHARED_CONF_FCLK_REQ (1UL << 1) 120 #define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0) 121 122 #define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16) 123 #define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15) 124 #define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11) 125 #define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10) 126 #define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9) 127 #define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8) 128 #define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7) 129 #define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6) 130 #define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5) 131 #define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4) 132 #define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3) 133 #define TLL_CHANNEL_CONF_CHANEN (1UL << 0) 134 135 struct omap_tll_softc { 136 device_t sc_dev; 137 138 /* TLL register set */ 139 struct resource* tll_mem_res; 140 int tll_mem_rid; 141 }; 142 143 static struct omap_tll_softc *omap_tll_sc; 144 145 static int omap_tll_attach(device_t dev); 146 static int omap_tll_detach(device_t dev); 147 148 static inline uint32_t 149 omap_tll_read_4(struct omap_tll_softc *sc, bus_size_t off) 150 { 151 return bus_read_4(sc->tll_mem_res, off); 152 } 153 154 static inline void 155 omap_tll_write_4(struct omap_tll_softc *sc, bus_size_t off, uint32_t val) 156 { 157 bus_write_4(sc->tll_mem_res, off, val); 158 } 159 160 void 161 omap_tll_utmi_enable(unsigned int en_mask) 162 { 163 struct omap_tll_softc *sc; 164 unsigned int i; 165 uint32_t reg; 166 167 sc = omap_tll_sc; 168 if (sc == NULL) 169 return; 170 171 /* There are 3 TLL channels, one per USB controller so set them all up the 172 * same, SDR mode, bit stuffing and no autoidle. 173 */ 174 for (i=0; i<3; i++) { 175 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); 176 177 reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE 178 | TLL_CHANNEL_CONF_ULPINOBITSTUFF 179 | TLL_CHANNEL_CONF_ULPIDDRMODE); 180 181 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); 182 } 183 184 /* Program the common TLL register */ 185 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_SHARED_CONF); 186 187 reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN 188 | TLL_SHARED_CONF_USB_DIVRATIO_MASK); 189 reg |= ( TLL_SHARED_CONF_FCLK_IS_ON 190 | TLL_SHARED_CONF_USB_DIVRATIO_2 191 | TLL_SHARED_CONF_USB_180D_SDR_EN); 192 193 omap_tll_write_4(sc, OMAP_USBTLL_TLL_SHARED_CONF, reg); 194 195 /* Enable channels now */ 196 for (i = 0; i < 3; i++) { 197 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); 198 199 /* Enable only the reg that is needed */ 200 if ((en_mask & (1 << i)) == 0) 201 continue; 202 203 reg |= TLL_CHANNEL_CONF_CHANEN; 204 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); 205 } 206 } 207 208 static int 209 omap_tll_init(struct omap_tll_softc *sc) 210 { 211 unsigned long timeout; 212 int ret = 0; 213 214 /* Enable the USB TLL */ 215 ti_sysc_clock_enable(device_get_parent(sc->sc_dev)); 216 217 /* Perform TLL soft reset, and wait until reset is complete */ 218 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET); 219 220 /* Set the timeout to 100ms*/ 221 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); 222 223 /* Wait for TLL reset to complete */ 224 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & 225 TLL_SYSSTATUS_RESETDONE) == 0x00) { 226 /* Sleep for a tick */ 227 pause("USBRESET", 1); 228 229 if (timeout-- == 0) { 230 device_printf(sc->sc_dev, "TLL reset operation timed out\n"); 231 ret = EINVAL; 232 goto err_sys_status; 233 } 234 } 235 236 /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle 237 * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq 238 * assertion when no more activity on the USB. 239 * ENAWAKEUP = 1 : Wakeup generation enabled 240 */ 241 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP | 242 TLL_SYSCONFIG_AUTOIDLE | 243 TLL_SYSCONFIG_SIDLE_SMART_IDLE | 244 TLL_SYSCONFIG_CACTIVITY); 245 246 return(0); 247 248 err_sys_status: 249 /* Disable the TLL clocks */ 250 ti_sysc_clock_disable(device_get_parent(sc->sc_dev)); 251 252 return(ret); 253 } 254 255 static void 256 omap_tll_disable(struct omap_tll_softc *sc) 257 { 258 unsigned long timeout; 259 260 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); 261 262 /* Reset the TLL module */ 263 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, 0x0002); 264 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) { 265 /* Sleep for a tick */ 266 pause("USBRESET", 1); 267 268 if (timeout-- == 0) { 269 device_printf(sc->sc_dev, "operation timed out\n"); 270 break; 271 } 272 } 273 274 /* Disable functional and interface clocks for the TLL and HOST modules */ 275 ti_sysc_clock_disable(device_get_parent(sc->sc_dev)); 276 } 277 278 static int 279 omap_tll_probe(device_t dev) 280 { 281 282 if (!ofw_bus_status_okay(dev)) 283 return (ENXIO); 284 285 if (!ofw_bus_is_compatible(dev, "ti,usbhs-tll")) 286 return (ENXIO); 287 288 device_set_desc(dev, "TI OMAP USB 2.0 TLL module"); 289 290 return (BUS_PROBE_DEFAULT); 291 } 292 293 static int 294 omap_tll_attach(device_t dev) 295 { 296 struct omap_tll_softc *sc; 297 298 sc = device_get_softc(dev); 299 /* save the device */ 300 sc->sc_dev = dev; 301 302 /* Allocate resource for the TLL register set */ 303 sc->tll_mem_rid = 0; 304 sc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 305 &sc->tll_mem_rid, RF_ACTIVE); 306 if (!sc->tll_mem_res) { 307 device_printf(dev, "Error: Could not map TLL memory\n"); 308 goto error; 309 } 310 311 omap_tll_init(sc); 312 313 omap_tll_sc = sc; 314 315 return (0); 316 317 error: 318 omap_tll_detach(dev); 319 return (ENXIO); 320 } 321 322 static int 323 omap_tll_detach(device_t dev) 324 { 325 struct omap_tll_softc *sc; 326 327 sc = device_get_softc(dev); 328 omap_tll_disable(sc); 329 330 /* Release the other register set memory maps */ 331 if (sc->tll_mem_res) { 332 bus_release_resource(dev, SYS_RES_MEMORY, 333 sc->tll_mem_rid, sc->tll_mem_res); 334 sc->tll_mem_res = NULL; 335 } 336 337 omap_tll_sc = NULL; 338 339 return (0); 340 } 341 342 static device_method_t omap_tll_methods[] = { 343 /* Device interface */ 344 DEVMETHOD(device_probe, omap_tll_probe), 345 DEVMETHOD(device_attach, omap_tll_attach), 346 DEVMETHOD(device_detach, omap_tll_detach), 347 DEVMETHOD(device_suspend, bus_generic_suspend), 348 DEVMETHOD(device_resume, bus_generic_resume), 349 DEVMETHOD(device_shutdown, bus_generic_shutdown), 350 {0, 0} 351 }; 352 353 static driver_t omap_tll_driver = { 354 "omap_tll", 355 omap_tll_methods, 356 sizeof(struct omap_tll_softc), 357 }; 358 359 DRIVER_MODULE(omap_tll, simplebus, omap_tll_driver, 0, 0);
Cache object: 90ba9b74b09f9b9fb95bcbecc7424635
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