1 /*-
2 * Copyright (c) 2012-2013 Thomas Skibo
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 /*
30 * A host-controller driver for Zynq-7000's USB OTG controller.
31 *
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB
34 * controller and register definitions are in appendix B.34.
35 */
36
37
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/bus.h>
44 #include <sys/conf.h>
45 #include <sys/kernel.h>
46 #include <sys/lock.h>
47 #include <sys/module.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/resource.h>
51 #include <sys/rman.h>
52
53 #include <machine/bus.h>
54 #include <machine/resource.h>
55 #include <machine/stdarg.h>
56
57 #include <dev/fdt/fdt_common.h>
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60
61 #include <dev/usb/usb.h>
62 #include <dev/usb/usbdi.h>
63
64 #include <dev/usb/usb_core.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_util.h>
68
69 #include <dev/usb/usb_controller.h>
70 #include <dev/usb/usb_bus.h>
71 #include <dev/usb/controller/ehci.h>
72 #include <dev/usb/controller/ehcireg.h>
73
74
75 /* Register definitions. */
76 #define ZY7_USB_ID 0x0000
77 #define ZY7_USB_HWGENERAL 0x0004
78 #define ZY7_USB_HWHOST 0x0008
79 #define ZY7_USB_HWDEVICE 0x000c
80 #define ZY7_USB_HWTXBUF 0x0010
81 #define ZY7_USB_HWRXBUF 0x0014
82 #define ZY7_USB_GPTIMER0LD 0x0080
83 #define ZY7_USB_GPTIMER0CTRL 0x0084
84 #define ZY7_USB_GPTIMER1LD 0x0088
85 #define ZY7_USB_GPTIMER1CTRL 0x008c
86 #define ZY7_USB_SBUSCFG 0x0090
87 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100
88 #define ZY7_USB_HCSPARAMS 0x0104
89 #define ZY7_USB_HCCPARAMS 0x0108
90 #define ZY7_USB_DCIVERSION 0x0120
91 #define ZY7_USB_DCCPARAMS 0x0124
92 #define ZY7_USB_USBCMD 0x0140
93 #define ZY7_USB_USBSTS 0x0144
94 #define ZY7_USB_USBINTR 0x0148
95 #define ZY7_USB_FRINDEX 0x014c
96 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154
97 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158
98 #define ZY7_USB_TTCTRL 0x015c
99 #define ZY7_USB_BURSTSIZE 0x0160
100 #define ZY7_USB_TXFILLTUNING 0x0164
101 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16
102 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16)
103 #define ZY7_USB_TXTFILLTUNING 0x0168
104 #define ZY7_USB_IC_USB 0x016c
105 #define ZY7_USB_ULPI_VIEWPORT 0x0170
106 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31)
107 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30)
108 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29)
109 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27)
110 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24)
111 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24
112 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16)
113 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16
114 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8)
115 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8
116 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0)
117 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0
118 #define ZY7_USB_ENDPTNAK 0x0178
119 #define ZY7_USB_ENDPTNAKEN 0x017c
120 #define ZY7_USB_CONFIGFLAG 0x0180
121 #define ZY7_USB_PORTSC(n) (0x0180+4*(n))
122 #define ZY7_USB_PORTSC_PTS_MASK (3<<30)
123 #define ZY7_USB_PORTSC_PTS_SHIFT 30
124 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30)
125 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30)
126 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30)
127 #define ZY7_USB_PORTSC_PTW (1<<28)
128 #define ZY7_USB_PORTSC_PTS2 (1<<25)
129 #define ZY7_USB_OTGSC 0x01a4
130 #define ZY7_USB_USBMODE 0x01a8
131 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac
132 #define ZY7_USB_ENDPTPRIME 0x01b0
133 #define ZY7_USB_ENDPTFLUSH 0x01b4
134 #define ZY7_USB_ENDPTSTAT 0x01b8
135 #define ZY7_USB_ENDPTCOMPLETE 0x01bc
136 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n))
137
138 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION
139 #define EHCI_REG_SIZE 0x100
140
141 static void
142 zy7_ehci_post_reset(struct ehci_softc *ehci_softc)
143 {
144 uint32_t usbmode;
145
146 /* Force HOST mode */
147 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
148 usbmode &= ~EHCI_UM_CM;
149 usbmode |= EHCI_UM_CM_HOST;
150 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
151 }
152
153 static int
154 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
155 {
156 phandle_t node;
157 char buf[64];
158 uint32_t portsc;
159 int tries;
160
161 node = ofw_bus_get_node(dev);
162
163 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) {
164 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1));
165 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW |
166 ZY7_USB_PORTSC_PTS2);
167
168 if (strcmp(buf,"ulpi") == 0)
169 portsc |= ZY7_USB_PORTSC_PTS_ULPI;
170 else if (strcmp(buf,"utmi") == 0)
171 portsc |= ZY7_USB_PORTSC_PTS_UTMI;
172 else if (strcmp(buf,"utmi-wide") == 0)
173 portsc |= (ZY7_USB_PORTSC_PTS_UTMI |
174 ZY7_USB_PORTSC_PTW);
175 else if (strcmp(buf, "serial") == 0)
176 portsc |= ZY7_USB_PORTSC_PTS_SERIAL;
177
178 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc);
179 }
180
181 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) {
182
183 /* Tell PHY that VBUS is supplied externally. */
184 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT,
185 ZY7_USB_ULPI_VIEWPORT_RUN |
186 ZY7_USB_ULPI_VIEWPORT_RW |
187 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) |
188 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) |
189 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT)
190 );
191
192 tries = 100;
193 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) &
194 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) {
195 if (--tries < 0)
196 return (-1);
197 DELAY(1);
198 }
199 }
200
201 return (0);
202 }
203
204 static int
205 zy7_ehci_probe(device_t dev)
206 {
207
208 if (!ofw_bus_status_okay(dev))
209 return (ENXIO);
210
211 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci"))
212 return (ENXIO);
213
214 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller");
215 return (0);
216 }
217
218 static int zy7_ehci_detach(device_t dev);
219
220 static int
221 zy7_ehci_attach(device_t dev)
222 {
223 ehci_softc_t *sc = device_get_softc(dev);
224 bus_space_handle_t bsh;
225 int err, rid;
226
227 /* initialize some bus fields */
228 sc->sc_bus.parent = dev;
229 sc->sc_bus.devices = sc->sc_devices;
230 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
231 sc->sc_bus.dma_bits = 32;
232
233 /* get all DMA memory */
234 if (usb_bus_mem_alloc_all(&sc->sc_bus,
235 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc))
236 return (ENOMEM);
237
238 /* Allocate memory. */
239 rid = 0;
240 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
241 &rid, RF_ACTIVE);
242 if (sc->sc_io_res == NULL) {
243 device_printf(dev, "Can't allocate memory");
244 zy7_ehci_detach(dev);
245 return (ENOMEM);
246 }
247
248 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
249 bsh = rman_get_bushandle(sc->sc_io_res);
250 sc->sc_io_size = EHCI_REG_SIZE;
251
252 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET,
253 sc->sc_io_size, &sc->sc_io_hdl) != 0)
254 panic("%s: unable to subregion USB host registers",
255 device_get_name(dev));
256
257 /* Allocate IRQ. */
258 rid = 0;
259 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
260 RF_ACTIVE);
261 if (sc->sc_irq_res == NULL) {
262 device_printf(dev, "Can't allocate IRQ\n");
263 zy7_ehci_detach(dev);
264 return (ENOMEM);
265 }
266
267 /* Add USB device */
268 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
269 if (!sc->sc_bus.bdev) {
270 device_printf(dev, "Could not add USB device\n");
271 zy7_ehci_detach(dev);
272 return (ENXIO);
273 }
274 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
275 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller");
276
277 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */
278
279 /* Activate the interrupt */
280 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
281 NULL, (driver_intr_t *)ehci_interrupt, sc,
282 &sc->sc_intr_hdl);
283 if (err) {
284 device_printf(dev, "Cannot setup IRQ\n");
285 zy7_ehci_detach(dev);
286 return (err);
287 }
288
289 /* Customization. */
290 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
291 sc->sc_vendor_post_reset = zy7_ehci_post_reset;
292 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
293
294 /* Modify FIFO burst threshold from 2 to 8. */
295 bus_space_write_4(sc->sc_io_tag, bsh,
296 ZY7_USB_TXFILLTUNING,
297 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT);
298
299 /* Handle PHY options. */
300 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) {
301 device_printf(dev, "Cannot config phy!\n");
302 zy7_ehci_detach(dev);
303 return (EIO);
304 }
305
306 /* Init ehci. */
307 err = ehci_init(sc);
308 if (!err) {
309 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
310 err = device_probe_and_attach(sc->sc_bus.bdev);
311 }
312 if (err) {
313 device_printf(dev, "USB init failed err=%d\n", err);
314 zy7_ehci_detach(dev);
315 return (err);
316 }
317
318 return (0);
319 }
320
321 static int
322 zy7_ehci_detach(device_t dev)
323 {
324 ehci_softc_t *sc = device_get_softc(dev);
325
326 /* during module unload there are lots of children leftover */
327 device_delete_children(dev);
328
329 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
330
331 if (sc->sc_irq_res && sc->sc_intr_hdl)
332 /* call ehci_detach() after ehci_init() called after
333 * successful bus_setup_intr().
334 */
335 ehci_detach(sc);
336
337 if (sc->sc_irq_res) {
338 if (sc->sc_intr_hdl != NULL)
339 bus_teardown_intr(dev, sc->sc_irq_res,
340 sc->sc_intr_hdl);
341 bus_release_resource(dev, SYS_RES_IRQ,
342 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
343 }
344
345 if (sc->sc_io_res)
346 bus_release_resource(dev, SYS_RES_MEMORY,
347 rman_get_rid(sc->sc_io_res), sc->sc_io_res);
348 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
349
350 return (0);
351 }
352
353 static device_method_t ehci_methods[] = {
354 /* Device interface */
355 DEVMETHOD(device_probe, zy7_ehci_probe),
356 DEVMETHOD(device_attach, zy7_ehci_attach),
357 DEVMETHOD(device_detach, zy7_ehci_detach),
358 DEVMETHOD(device_suspend, bus_generic_suspend),
359 DEVMETHOD(device_resume, bus_generic_resume),
360 DEVMETHOD(device_shutdown, bus_generic_shutdown),
361
362 /* Bus interface */
363 DEVMETHOD(bus_print_child, bus_generic_print_child),
364
365 DEVMETHOD_END
366 };
367
368 static driver_t ehci_driver = {
369 "ehci",
370 ehci_methods,
371 sizeof(struct ehci_softc),
372 };
373 static devclass_t ehci_devclass;
374
375 DRIVER_MODULE(zy7_ehci, simplebus, ehci_driver, ehci_devclass, NULL, NULL);
376 MODULE_DEPEND(zy7_ehci, usb, 1, 1, 1);
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