Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/xilinx/zy7_ehci.c
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012-2013 Thomas Skibo 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 /* 32 * A host-controller driver for Zynq-7000's USB OTG controller. 33 * 34 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 35 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB 36 * controller and register definitions are in appendix B.34. 37 */ 38 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/bus.h> 46 #include <sys/conf.h> 47 #include <sys/kernel.h> 48 #include <sys/lock.h> 49 #include <sys/module.h> 50 #include <sys/mutex.h> 51 #include <sys/condvar.h> 52 #include <sys/resource.h> 53 #include <sys/rman.h> 54 55 #include <machine/bus.h> 56 #include <machine/resource.h> 57 #include <machine/stdarg.h> 58 59 #include <dev/ofw/ofw_bus.h> 60 #include <dev/ofw/ofw_bus_subr.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 65 #include <dev/usb/usb_core.h> 66 #include <dev/usb/usb_busdma.h> 67 #include <dev/usb/usb_process.h> 68 #include <dev/usb/usb_util.h> 69 70 #include <dev/usb/usb_controller.h> 71 #include <dev/usb/usb_bus.h> 72 #include <dev/usb/controller/ehci.h> 73 #include <dev/usb/controller/ehcireg.h> 74 75 76 /* Register definitions. */ 77 #define ZY7_USB_ID 0x0000 78 #define ZY7_USB_HWGENERAL 0x0004 79 #define ZY7_USB_HWHOST 0x0008 80 #define ZY7_USB_HWDEVICE 0x000c 81 #define ZY7_USB_HWTXBUF 0x0010 82 #define ZY7_USB_HWRXBUF 0x0014 83 #define ZY7_USB_GPTIMER0LD 0x0080 84 #define ZY7_USB_GPTIMER0CTRL 0x0084 85 #define ZY7_USB_GPTIMER1LD 0x0088 86 #define ZY7_USB_GPTIMER1CTRL 0x008c 87 #define ZY7_USB_SBUSCFG 0x0090 88 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100 89 #define ZY7_USB_HCSPARAMS 0x0104 90 #define ZY7_USB_HCCPARAMS 0x0108 91 #define ZY7_USB_DCIVERSION 0x0120 92 #define ZY7_USB_DCCPARAMS 0x0124 93 #define ZY7_USB_USBCMD 0x0140 94 #define ZY7_USB_USBSTS 0x0144 95 #define ZY7_USB_USBINTR 0x0148 96 #define ZY7_USB_FRINDEX 0x014c 97 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154 98 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158 99 #define ZY7_USB_TTCTRL 0x015c 100 #define ZY7_USB_BURSTSIZE 0x0160 101 #define ZY7_USB_TXFILLTUNING 0x0164 102 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16 103 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16) 104 #define ZY7_USB_TXTFILLTUNING 0x0168 105 #define ZY7_USB_IC_USB 0x016c 106 #define ZY7_USB_ULPI_VIEWPORT 0x0170 107 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31) 108 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30) 109 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29) 110 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27) 111 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24) 112 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24 113 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16) 114 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16 115 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8) 116 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8 117 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0) 118 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0 119 #define ZY7_USB_ENDPTNAK 0x0178 120 #define ZY7_USB_ENDPTNAKEN 0x017c 121 #define ZY7_USB_CONFIGFLAG 0x0180 122 #define ZY7_USB_PORTSC(n) (0x0180+4*(n)) 123 #define ZY7_USB_PORTSC_PTS_MASK (3<<30) 124 #define ZY7_USB_PORTSC_PTS_SHIFT 30 125 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30) 126 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30) 127 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30) 128 #define ZY7_USB_PORTSC_PTW (1<<28) 129 #define ZY7_USB_PORTSC_PTS2 (1<<25) 130 #define ZY7_USB_OTGSC 0x01a4 131 #define ZY7_USB_USBMODE 0x01a8 132 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac 133 #define ZY7_USB_ENDPTPRIME 0x01b0 134 #define ZY7_USB_ENDPTFLUSH 0x01b4 135 #define ZY7_USB_ENDPTSTAT 0x01b8 136 #define ZY7_USB_ENDPTCOMPLETE 0x01bc 137 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n)) 138 139 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION 140 #define EHCI_REG_SIZE 0x100 141 142 static void 143 zy7_ehci_post_reset(struct ehci_softc *ehci_softc) 144 { 145 uint32_t usbmode; 146 147 /* Force HOST mode */ 148 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 149 usbmode &= ~EHCI_UM_CM; 150 usbmode |= EHCI_UM_CM_HOST; 151 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 152 } 153 154 static int 155 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh) 156 { 157 phandle_t node; 158 char buf[64]; 159 uint32_t portsc; 160 int tries; 161 162 node = ofw_bus_get_node(dev); 163 164 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) { 165 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1)); 166 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW | 167 ZY7_USB_PORTSC_PTS2); 168 169 if (strcmp(buf,"ulpi") == 0) 170 portsc |= ZY7_USB_PORTSC_PTS_ULPI; 171 else if (strcmp(buf,"utmi") == 0) 172 portsc |= ZY7_USB_PORTSC_PTS_UTMI; 173 else if (strcmp(buf,"utmi-wide") == 0) 174 portsc |= (ZY7_USB_PORTSC_PTS_UTMI | 175 ZY7_USB_PORTSC_PTW); 176 else if (strcmp(buf, "serial") == 0) 177 portsc |= ZY7_USB_PORTSC_PTS_SERIAL; 178 179 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc); 180 } 181 182 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) { 183 184 /* Tell PHY that VBUS is supplied externally. */ 185 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT, 186 ZY7_USB_ULPI_VIEWPORT_RUN | 187 ZY7_USB_ULPI_VIEWPORT_RW | 188 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) | 189 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) | 190 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT) 191 ); 192 193 tries = 100; 194 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) & 195 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) { 196 if (--tries < 0) 197 return (-1); 198 DELAY(1); 199 } 200 } 201 202 return (0); 203 } 204 205 static int 206 zy7_ehci_probe(device_t dev) 207 { 208 209 if (!ofw_bus_status_okay(dev)) 210 return (ENXIO); 211 212 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci")) 213 return (ENXIO); 214 215 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller"); 216 return (0); 217 } 218 219 static int zy7_ehci_detach(device_t dev); 220 221 static int 222 zy7_ehci_attach(device_t dev) 223 { 224 ehci_softc_t *sc = device_get_softc(dev); 225 bus_space_handle_t bsh; 226 int err, rid; 227 228 /* initialize some bus fields */ 229 sc->sc_bus.parent = dev; 230 sc->sc_bus.devices = sc->sc_devices; 231 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 232 sc->sc_bus.dma_bits = 32; 233 234 /* get all DMA memory */ 235 if (usb_bus_mem_alloc_all(&sc->sc_bus, 236 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) 237 return (ENOMEM); 238 239 /* Allocate memory. */ 240 rid = 0; 241 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 242 &rid, RF_ACTIVE); 243 if (sc->sc_io_res == NULL) { 244 device_printf(dev, "Can't allocate memory"); 245 zy7_ehci_detach(dev); 246 return (ENOMEM); 247 } 248 249 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 250 bsh = rman_get_bushandle(sc->sc_io_res); 251 sc->sc_io_size = EHCI_REG_SIZE; 252 253 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET, 254 sc->sc_io_size, &sc->sc_io_hdl) != 0) 255 panic("%s: unable to subregion USB host registers", 256 device_get_name(dev)); 257 258 /* Allocate IRQ. */ 259 rid = 0; 260 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 261 RF_ACTIVE); 262 if (sc->sc_irq_res == NULL) { 263 device_printf(dev, "Can't allocate IRQ\n"); 264 zy7_ehci_detach(dev); 265 return (ENOMEM); 266 } 267 268 /* Add USB device */ 269 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 270 if (!sc->sc_bus.bdev) { 271 device_printf(dev, "Could not add USB device\n"); 272 zy7_ehci_detach(dev); 273 return (ENXIO); 274 } 275 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 276 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller"); 277 278 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */ 279 280 /* Activate the interrupt */ 281 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 282 NULL, (driver_intr_t *)ehci_interrupt, sc, 283 &sc->sc_intr_hdl); 284 if (err) { 285 device_printf(dev, "Cannot setup IRQ\n"); 286 zy7_ehci_detach(dev); 287 return (err); 288 } 289 290 /* Customization. */ 291 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 292 sc->sc_vendor_post_reset = zy7_ehci_post_reset; 293 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 294 295 /* Modify FIFO burst threshold from 2 to 8. */ 296 bus_space_write_4(sc->sc_io_tag, bsh, 297 ZY7_USB_TXFILLTUNING, 298 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT); 299 300 /* Handle PHY options. */ 301 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) { 302 device_printf(dev, "Cannot config phy!\n"); 303 zy7_ehci_detach(dev); 304 return (EIO); 305 } 306 307 /* Init ehci. */ 308 err = ehci_init(sc); 309 if (!err) { 310 sc->sc_flags |= EHCI_SCFLG_DONEINIT; 311 err = device_probe_and_attach(sc->sc_bus.bdev); 312 } 313 if (err) { 314 device_printf(dev, "USB init failed err=%d\n", err); 315 zy7_ehci_detach(dev); 316 return (err); 317 } 318 319 return (0); 320 } 321 322 static int 323 zy7_ehci_detach(device_t dev) 324 { 325 ehci_softc_t *sc = device_get_softc(dev); 326 327 /* during module unload there are lots of children leftover */ 328 device_delete_children(dev); 329 330 if ((sc->sc_flags & EHCI_SCFLG_DONEINIT) != 0) { 331 ehci_detach(sc); 332 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; 333 } 334 335 if (sc->sc_irq_res) { 336 if (sc->sc_intr_hdl != NULL) 337 bus_teardown_intr(dev, sc->sc_irq_res, 338 sc->sc_intr_hdl); 339 bus_release_resource(dev, SYS_RES_IRQ, 340 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 341 } 342 343 if (sc->sc_io_res) 344 bus_release_resource(dev, SYS_RES_MEMORY, 345 rman_get_rid(sc->sc_io_res), sc->sc_io_res); 346 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 347 348 return (0); 349 } 350 351 static device_method_t ehci_methods[] = { 352 /* Device interface */ 353 DEVMETHOD(device_probe, zy7_ehci_probe), 354 DEVMETHOD(device_attach, zy7_ehci_attach), 355 DEVMETHOD(device_detach, zy7_ehci_detach), 356 DEVMETHOD(device_suspend, bus_generic_suspend), 357 DEVMETHOD(device_resume, bus_generic_resume), 358 DEVMETHOD(device_shutdown, bus_generic_shutdown), 359 360 /* Bus interface */ 361 DEVMETHOD(bus_print_child, bus_generic_print_child), 362 363 DEVMETHOD_END 364 }; 365 366 static driver_t ehci_driver = { 367 "ehci", 368 ehci_methods, 369 sizeof(struct ehci_softc), 370 }; 371 static devclass_t ehci_devclass; 372 373 DRIVER_MODULE(zy7_ehci, simplebus, ehci_driver, ehci_devclass, NULL, NULL); 374 MODULE_DEPEND(zy7_ehci, usb, 1, 1, 1);
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