1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2012-2013 Thomas Skibo
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 /*
32 * A host-controller driver for Zynq-7000's USB OTG controller.
33 *
34 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
35 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB
36 * controller and register definitions are in appendix B.34.
37 */
38
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/bus.h>
45 #include <sys/conf.h>
46 #include <sys/kernel.h>
47 #include <sys/lock.h>
48 #include <sys/module.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51 #include <sys/resource.h>
52 #include <sys/rman.h>
53
54 #include <machine/bus.h>
55 #include <machine/resource.h>
56 #include <machine/stdarg.h>
57
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60
61 #include <dev/usb/usb.h>
62 #include <dev/usb/usbdi.h>
63
64 #include <dev/usb/usb_core.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_util.h>
68
69 #include <dev/usb/usb_controller.h>
70 #include <dev/usb/usb_bus.h>
71 #include <dev/usb/controller/ehci.h>
72 #include <dev/usb/controller/ehcireg.h>
73
74 /* Register definitions. */
75 #define ZY7_USB_ID 0x0000
76 #define ZY7_USB_HWGENERAL 0x0004
77 #define ZY7_USB_HWHOST 0x0008
78 #define ZY7_USB_HWDEVICE 0x000c
79 #define ZY7_USB_HWTXBUF 0x0010
80 #define ZY7_USB_HWRXBUF 0x0014
81 #define ZY7_USB_GPTIMER0LD 0x0080
82 #define ZY7_USB_GPTIMER0CTRL 0x0084
83 #define ZY7_USB_GPTIMER1LD 0x0088
84 #define ZY7_USB_GPTIMER1CTRL 0x008c
85 #define ZY7_USB_SBUSCFG 0x0090
86 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100
87 #define ZY7_USB_HCSPARAMS 0x0104
88 #define ZY7_USB_HCCPARAMS 0x0108
89 #define ZY7_USB_DCIVERSION 0x0120
90 #define ZY7_USB_DCCPARAMS 0x0124
91 #define ZY7_USB_USBCMD 0x0140
92 #define ZY7_USB_USBSTS 0x0144
93 #define ZY7_USB_USBINTR 0x0148
94 #define ZY7_USB_FRINDEX 0x014c
95 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154
96 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158
97 #define ZY7_USB_TTCTRL 0x015c
98 #define ZY7_USB_BURSTSIZE 0x0160
99 #define ZY7_USB_TXFILLTUNING 0x0164
100 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16
101 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16)
102 #define ZY7_USB_TXTFILLTUNING 0x0168
103 #define ZY7_USB_IC_USB 0x016c
104 #define ZY7_USB_ULPI_VIEWPORT 0x0170
105 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31)
106 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30)
107 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29)
108 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27)
109 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24)
110 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24
111 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16)
112 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16
113 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8)
114 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8
115 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0)
116 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0
117 #define ZY7_USB_ENDPTNAK 0x0178
118 #define ZY7_USB_ENDPTNAKEN 0x017c
119 #define ZY7_USB_CONFIGFLAG 0x0180
120 #define ZY7_USB_PORTSC(n) (0x0180+4*(n))
121 #define ZY7_USB_PORTSC_PTS_MASK (3<<30)
122 #define ZY7_USB_PORTSC_PTS_SHIFT 30
123 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30)
124 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30)
125 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30)
126 #define ZY7_USB_PORTSC_PTW (1<<28)
127 #define ZY7_USB_PORTSC_PTS2 (1<<25)
128 #define ZY7_USB_OTGSC 0x01a4
129 #define ZY7_USB_USBMODE 0x01a8
130 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac
131 #define ZY7_USB_ENDPTPRIME 0x01b0
132 #define ZY7_USB_ENDPTFLUSH 0x01b4
133 #define ZY7_USB_ENDPTSTAT 0x01b8
134 #define ZY7_USB_ENDPTCOMPLETE 0x01bc
135 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n))
136
137 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION
138 #define EHCI_REG_SIZE 0x100
139
140 static void
141 zy7_ehci_post_reset(struct ehci_softc *ehci_softc)
142 {
143 uint32_t usbmode;
144
145 /* Force HOST mode */
146 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
147 usbmode &= ~EHCI_UM_CM;
148 usbmode |= EHCI_UM_CM_HOST;
149 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
150 }
151
152 static int
153 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
154 {
155 phandle_t node;
156 char buf[64];
157 uint32_t portsc;
158 int tries;
159
160 node = ofw_bus_get_node(dev);
161
162 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) {
163 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1));
164 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW |
165 ZY7_USB_PORTSC_PTS2);
166
167 if (strcmp(buf,"ulpi") == 0)
168 portsc |= ZY7_USB_PORTSC_PTS_ULPI;
169 else if (strcmp(buf,"utmi") == 0)
170 portsc |= ZY7_USB_PORTSC_PTS_UTMI;
171 else if (strcmp(buf,"utmi-wide") == 0)
172 portsc |= (ZY7_USB_PORTSC_PTS_UTMI |
173 ZY7_USB_PORTSC_PTW);
174 else if (strcmp(buf, "serial") == 0)
175 portsc |= ZY7_USB_PORTSC_PTS_SERIAL;
176
177 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc);
178 }
179
180 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) {
181 /* Tell PHY that VBUS is supplied externally. */
182 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT,
183 ZY7_USB_ULPI_VIEWPORT_RUN |
184 ZY7_USB_ULPI_VIEWPORT_RW |
185 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) |
186 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) |
187 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT)
188 );
189
190 tries = 100;
191 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) &
192 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) {
193 if (--tries < 0)
194 return (-1);
195 DELAY(1);
196 }
197 }
198
199 return (0);
200 }
201
202 static int
203 zy7_ehci_probe(device_t dev)
204 {
205
206 if (!ofw_bus_status_okay(dev))
207 return (ENXIO);
208
209 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci"))
210 return (ENXIO);
211
212 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller");
213 return (0);
214 }
215
216 static int zy7_ehci_detach(device_t dev);
217
218 static int
219 zy7_ehci_attach(device_t dev)
220 {
221 ehci_softc_t *sc = device_get_softc(dev);
222 bus_space_handle_t bsh;
223 int err, rid;
224
225 /* initialize some bus fields */
226 sc->sc_bus.parent = dev;
227 sc->sc_bus.devices = sc->sc_devices;
228 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
229 sc->sc_bus.dma_bits = 32;
230
231 /* get all DMA memory */
232 if (usb_bus_mem_alloc_all(&sc->sc_bus,
233 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc))
234 return (ENOMEM);
235
236 /* Allocate memory. */
237 rid = 0;
238 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
239 &rid, RF_ACTIVE);
240 if (sc->sc_io_res == NULL) {
241 device_printf(dev, "Can't allocate memory");
242 zy7_ehci_detach(dev);
243 return (ENOMEM);
244 }
245
246 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
247 bsh = rman_get_bushandle(sc->sc_io_res);
248 sc->sc_io_size = EHCI_REG_SIZE;
249
250 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET,
251 sc->sc_io_size, &sc->sc_io_hdl) != 0)
252 panic("%s: unable to subregion USB host registers",
253 device_get_name(dev));
254
255 /* Allocate IRQ. */
256 rid = 0;
257 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
258 RF_ACTIVE);
259 if (sc->sc_irq_res == NULL) {
260 device_printf(dev, "Can't allocate IRQ\n");
261 zy7_ehci_detach(dev);
262 return (ENOMEM);
263 }
264
265 /* Add USB device */
266 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
267 if (!sc->sc_bus.bdev) {
268 device_printf(dev, "Could not add USB device\n");
269 zy7_ehci_detach(dev);
270 return (ENXIO);
271 }
272 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
273 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller");
274
275 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */
276
277 /* Activate the interrupt */
278 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
279 NULL, (driver_intr_t *)ehci_interrupt, sc,
280 &sc->sc_intr_hdl);
281 if (err) {
282 device_printf(dev, "Cannot setup IRQ\n");
283 zy7_ehci_detach(dev);
284 return (err);
285 }
286
287 /* Customization. */
288 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
289 sc->sc_vendor_post_reset = zy7_ehci_post_reset;
290 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
291
292 /* Modify FIFO burst threshold from 2 to 8. */
293 bus_space_write_4(sc->sc_io_tag, bsh,
294 ZY7_USB_TXFILLTUNING,
295 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT);
296
297 /* Handle PHY options. */
298 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) {
299 device_printf(dev, "Cannot config phy!\n");
300 zy7_ehci_detach(dev);
301 return (EIO);
302 }
303
304 /* Init ehci. */
305 err = ehci_init(sc);
306 if (!err) {
307 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
308 err = device_probe_and_attach(sc->sc_bus.bdev);
309 }
310 if (err) {
311 device_printf(dev, "USB init failed err=%d\n", err);
312 zy7_ehci_detach(dev);
313 return (err);
314 }
315
316 return (0);
317 }
318
319 static int
320 zy7_ehci_detach(device_t dev)
321 {
322 ehci_softc_t *sc = device_get_softc(dev);
323
324 /* during module unload there are lots of children leftover */
325 device_delete_children(dev);
326
327 if ((sc->sc_flags & EHCI_SCFLG_DONEINIT) != 0) {
328 ehci_detach(sc);
329 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
330 }
331
332 if (sc->sc_irq_res) {
333 if (sc->sc_intr_hdl != NULL)
334 bus_teardown_intr(dev, sc->sc_irq_res,
335 sc->sc_intr_hdl);
336 bus_release_resource(dev, SYS_RES_IRQ,
337 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
338 }
339
340 if (sc->sc_io_res)
341 bus_release_resource(dev, SYS_RES_MEMORY,
342 rman_get_rid(sc->sc_io_res), sc->sc_io_res);
343 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
344
345 return (0);
346 }
347
348 static device_method_t ehci_methods[] = {
349 /* Device interface */
350 DEVMETHOD(device_probe, zy7_ehci_probe),
351 DEVMETHOD(device_attach, zy7_ehci_attach),
352 DEVMETHOD(device_detach, zy7_ehci_detach),
353 DEVMETHOD(device_suspend, bus_generic_suspend),
354 DEVMETHOD(device_resume, bus_generic_resume),
355 DEVMETHOD(device_shutdown, bus_generic_shutdown),
356
357 /* Bus interface */
358 DEVMETHOD(bus_print_child, bus_generic_print_child),
359
360 DEVMETHOD_END
361 };
362
363 static driver_t ehci_driver = {
364 "ehci",
365 ehci_methods,
366 sizeof(struct ehci_softc),
367 };
368 static devclass_t ehci_devclass;
369
370 DRIVER_MODULE(zy7_ehci, simplebus, ehci_driver, ehci_devclass, NULL, NULL);
371 MODULE_DEPEND(zy7_ehci, usb, 1, 1, 1);
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